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annotate test/CodeGen/AMDGPU/sint_to_fp.f64.ll @ 95:afa8332a0e37

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LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
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children 1172e4bd9c6f
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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2
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3 declare i32 @llvm.r600.read.tidig.x() nounwind readnone
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4
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5 ; SI-LABEL: {{^}}sint_to_fp_i32_to_f64
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6 ; SI: v_cvt_f64_i32_e32
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7 define void @sint_to_fp_i32_to_f64(double addrspace(1)* %out, i32 %in) {
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8 %result = sitofp i32 %in to double
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9 store double %result, double addrspace(1)* %out
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10 ret void
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11 }
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12
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13 ; FIXME: select on 0, 0
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14 ; SI-LABEL: {{^}}sint_to_fp_i1_f64:
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15 ; SI: v_cmp_eq_i32_e64 vcc,
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16 ; We can't fold the SGPRs into v_cndmask_b32_e64, because it already
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17 ; uses an SGPR (implicit vcc).
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18 ; SI: v_cndmask_b32_e32 v{{[0-9]+}}, 0, v{{[0-9]+}}
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19 ; SI: v_cndmask_b32_e64 v{{[0-9]+}}, 0, 0, vcc
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20 ; SI: buffer_store_dwordx2
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21 ; SI: s_endpgm
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22 define void @sint_to_fp_i1_f64(double addrspace(1)* %out, i32 %in) {
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23 %cmp = icmp eq i32 %in, 0
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24 %fp = sitofp i1 %cmp to double
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25 store double %fp, double addrspace(1)* %out, align 4
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26 ret void
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27 }
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28
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29 ; SI-LABEL: {{^}}sint_to_fp_i1_f64_load:
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30 ; SI: v_cndmask_b32_e64 [[IRESULT:v[0-9]]], 0, -1
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31 ; SI-NEXT: v_cvt_f64_i32_e32 [[RESULT:v\[[0-9]+:[0-9]\]]], [[IRESULT]]
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32 ; SI: buffer_store_dwordx2 [[RESULT]]
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33 ; SI: s_endpgm
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34 define void @sint_to_fp_i1_f64_load(double addrspace(1)* %out, i1 %in) {
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35 %fp = sitofp i1 %in to double
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36 store double %fp, double addrspace(1)* %out, align 8
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37 ret void
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38 }
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39
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40 ; SI-LABEL: @s_sint_to_fp_i64_to_f64
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41 define void @s_sint_to_fp_i64_to_f64(double addrspace(1)* %out, i64 %in) {
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42 %result = sitofp i64 %in to double
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43 store double %result, double addrspace(1)* %out
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44 ret void
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45 }
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46
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47 ; SI-LABEL: @v_sint_to_fp_i64_to_f64
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48 ; SI: buffer_load_dwordx2 v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]{{\]}}
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49 ; SI-DAG: v_cvt_f64_i32_e32 [[HI_CONV:v\[[0-9]+:[0-9]+\]]], v[[HI]]
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50 ; SI-DAG: v_cvt_f64_u32_e32 [[LO_CONV:v\[[0-9]+:[0-9]+\]]], v[[LO]]
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51 ; SI-DAG: v_ldexp_f64 [[LDEXP:v\[[0-9]+:[0-9]+\]]], [[HI_CONV]], 32
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52 ; SI: v_add_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[LDEXP]], [[LO_CONV]]
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53 ; SI: buffer_store_dwordx2 [[RESULT]]
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54 define void @v_sint_to_fp_i64_to_f64(double addrspace(1)* %out, i64 addrspace(1)* %in) {
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55 %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone
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56 %gep = getelementptr i64, i64 addrspace(1)* %in, i32 %tid
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57 %val = load i64, i64 addrspace(1)* %gep, align 8
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58 %result = sitofp i64 %val to double
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59 store double %result, double addrspace(1)* %out
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60 ret void
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61 }