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annotate test/CodeGen/Mips/selle.ll @ 95:afa8332a0e37

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LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents 95c75e76d11b
children 7d135dc70f03
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95c75e76d11b LLVM 3.4
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parents:
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1 ; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=16
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2
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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3 @t = global i32 10, align 4
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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4 @f = global i32 199, align 4
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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5 @a = global i32 1, align 4
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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6 @b = global i32 10, align 4
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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7 @c = global i32 1, align 4
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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8 @z1 = common global i32 0, align 4
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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9 @z2 = common global i32 0, align 4
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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10 @z3 = common global i32 0, align 4
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parents:
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11 @z4 = common global i32 0, align 4
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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12 @.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1
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13
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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14 define void @calc_z() nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" {
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15 entry:
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afa8332a0e37 LLVM 3.8
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parents: 0
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16 %0 = load i32, i32* @a, align 4
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17 %1 = load i32, i32* @b, align 4
0
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18 %cmp = icmp sle i32 %0, %1
95c75e76d11b LLVM 3.4
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19 br i1 %cmp, label %cond.true, label %cond.false
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20
95c75e76d11b LLVM 3.4
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21 cond.true: ; preds = %entry
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22 %2 = load i32, i32* @t, align 4
0
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23 br label %cond.end
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24
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25 cond.false: ; preds = %entry
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26 %3 = load i32, i32* @f, align 4
0
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27 br label %cond.end
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28
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29 cond.end: ; preds = %cond.false, %cond.true
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parents:
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30 %cond = phi i32 [ %2, %cond.true ], [ %3, %cond.false ]
95c75e76d11b LLVM 3.4
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31 store i32 %cond, i32* @z1, align 4
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32 %4 = load i32, i32* @b, align 4
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33 %5 = load i32, i32* @a, align 4
0
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34 %cmp1 = icmp sle i32 %4, %5
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35 br i1 %cmp1, label %cond.true2, label %cond.false3
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36
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37 cond.true2: ; preds = %cond.end
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38 %6 = load i32, i32* @f, align 4
0
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39 br label %cond.end4
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40
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41 cond.false3: ; preds = %cond.end
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42 %7 = load i32, i32* @t, align 4
0
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43 br label %cond.end4
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44
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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45 cond.end4: ; preds = %cond.false3, %cond.true2
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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46 %cond5 = phi i32 [ %6, %cond.true2 ], [ %7, %cond.false3 ]
95c75e76d11b LLVM 3.4
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47 store i32 %cond5, i32* @z2, align 4
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parents: 0
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48 %8 = load i32, i32* @c, align 4
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parents: 0
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49 %9 = load i32, i32* @a, align 4
0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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50 %cmp6 = icmp sle i32 %8, %9
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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51 br i1 %cmp6, label %cond.true7, label %cond.false8
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52
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53 cond.true7: ; preds = %cond.end4
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parents: 0
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54 %10 = load i32, i32* @t, align 4
0
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55 br label %cond.end9
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56
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57 cond.false8: ; preds = %cond.end4
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58 %11 = load i32, i32* @f, align 4
0
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59 br label %cond.end9
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60
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61 cond.end9: ; preds = %cond.false8, %cond.true7
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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62 %cond10 = phi i32 [ %10, %cond.true7 ], [ %11, %cond.false8 ]
95c75e76d11b LLVM 3.4
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63 store i32 %cond10, i32* @z3, align 4
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parents: 0
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64 %12 = load i32, i32* @a, align 4
afa8332a0e37 LLVM 3.8
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parents: 0
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65 %13 = load i32, i32* @c, align 4
0
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66 %cmp11 = icmp sle i32 %12, %13
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parents:
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67 br i1 %cmp11, label %cond.true12, label %cond.false13
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68
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69 cond.true12: ; preds = %cond.end9
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parents: 0
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70 %14 = load i32, i32* @t, align 4
0
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71 br label %cond.end14
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72
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73 cond.false13: ; preds = %cond.end9
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parents: 0
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74 %15 = load i32, i32* @f, align 4
0
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75 br label %cond.end14
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76
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77 cond.end14: ; preds = %cond.false13, %cond.true12
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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78 %cond15 = phi i32 [ %14, %cond.true12 ], [ %15, %cond.false13 ]
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parents:
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79 store i32 %cond15, i32* @z4, align 4
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80 ret void
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81 }
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82
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83 ; 16: slt ${{[0-9]+}}, ${{[0-9]+}}
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parents:
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84 ; 16: btnez $BB{{[0-9]+}}_{{[0-9]}}
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85
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86 ; 16: slt ${{[0-9]+}}, ${{[0-9]+}}
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87 ; 16: btnez $BB{{[0-9]+}}_{{[0-9]}}
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88
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89 ; 16: slt ${{[0-9]+}}, ${{[0-9]+}}
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90 ; 16: btnez $BB{{[0-9]+}}_{{[0-9]}}
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91
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92 ; 16: slt ${{[0-9]+}}, ${{[0-9]+}}
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parents:
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93 ; 16: btnez $BB{{[0-9]+}}_{{[0-9]}}
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parents:
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94
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95 attributes #0 = { nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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96 attributes #1 = { "target-cpu"="mips16" "target-features"="+mips16,+o32" }