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annotate test/CodeGen/NVPTX/vector-select.ll @ 95:afa8332a0e37

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LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents 95c75e76d11b
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95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc < %s -march=nvptx -mcpu=sm_20
95c75e76d11b LLVM 3.4
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2 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20
95c75e76d11b LLVM 3.4
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95c75e76d11b LLVM 3.4
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4 ; This test makes sure that vector selects are scalarized by the type legalizer.
95c75e76d11b LLVM 3.4
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5 ; If not, type legalization will fail.
95c75e76d11b LLVM 3.4
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95c75e76d11b LLVM 3.4
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7 define void @foo(<2 x i32> addrspace(1)* %def_a, <2 x i32> addrspace(1)* %def_b, <2 x i32> addrspace(1)* %def_c) {
95c75e76d11b LLVM 3.4
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8 entry:
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afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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9 %tmp4 = load <2 x i32>, <2 x i32> addrspace(1)* %def_a
afa8332a0e37 LLVM 3.8
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10 %tmp6 = load <2 x i32>, <2 x i32> addrspace(1)* %def_c
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11 %tmp8 = load <2 x i32>, <2 x i32> addrspace(1)* %def_b
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12 %0 = icmp sge <2 x i32> %tmp4, zeroinitializer
95c75e76d11b LLVM 3.4
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13 %cond = select <2 x i1> %0, <2 x i32> %tmp6, <2 x i32> %tmp8
95c75e76d11b LLVM 3.4
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14 store <2 x i32> %cond, <2 x i32> addrspace(1)* %def_c
95c75e76d11b LLVM 3.4
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15 ret void
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16 }