annotate test/CodeGen/X86/misched-aa-mmos.ll @ 95:afa8332a0e37

LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents 54457678186b
children
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1 ; RUN: llc -enable-misched -enable-aa-sched-mi < %s
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2
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3 ; This generates a decw instruction, which has two MMOs, and an alias SU edge
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4 ; query involving that instruction. Make sure this does not crash.
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5
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6 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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7 target triple = "x86_64-unknown-linux-gnu"
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8
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9 %s1 = type { i16, i16, i32 }
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10 %c1 = type { %s1*, %u1, i16, i8 }
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11 %u1 = type { i64 }
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12
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13 declare zeroext i1 @bar(i64*, i32) #5
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14
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15 define i32 @foo() #0 align 2 {
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16 entry:
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17 %temp_rhs = alloca %c1, align 8
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18 br i1 undef, label %if.else56, label %cond.end.i
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19
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20 cond.end.i:
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21 %significand.i18.i = getelementptr inbounds %c1, %c1* %temp_rhs, i64 0, i32 1
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22 %exponent.i = getelementptr inbounds %c1, %c1* %temp_rhs, i64 0, i32 2
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23 %0 = load i16, i16* %exponent.i, align 8
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24 %sub.i = add i16 %0, -1
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25 store i16 %sub.i, i16* %exponent.i, align 8
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26 %parts.i.i = bitcast %u1* %significand.i18.i to i64**
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27 %1 = load i64*, i64** %parts.i.i, align 8
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28 %call5.i = call zeroext i1 @bar(i64* %1, i32 undef) #1
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29 unreachable
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31 if.else56:
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32 unreachable
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33 }
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34
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35 attributes #0 = { nounwind uwtable }
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36 attributes #1 = { nounwind }
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37