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comparison test/CodeGen/R600/llvm.AMDGPU.rsq.ll @ 83:60c9769439b8

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LLVM 3.7
author Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
date Wed, 18 Feb 2015 14:55:36 +0900
parents 54457678186b
children
comparison
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78:af83660cff7b 83:60c9769439b8
1 ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2 ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s 3 ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
3 4
4 declare float @llvm.AMDGPU.rsq.f32(float) nounwind readnone 5 declare float @llvm.AMDGPU.rsq.f32(float) nounwind readnone
5 6
6 ; FUNC-LABEL: @rsq_f32 7 ; FUNC-LABEL: {{^}}rsq_f32:
7 ; SI: V_RSQ_F32_e32 8 ; SI: v_rsq_f32_e32 {{v[0-9]+}}, {{s[0-9]+}}
8 ; EG: RECIPSQRT_IEEE 9 ; EG: RECIPSQRT_IEEE
9 define void @rsq_f32(float addrspace(1)* %out, float %src) nounwind { 10 define void @rsq_f32(float addrspace(1)* %out, float %src) nounwind {
10 %rsq = call float @llvm.AMDGPU.rsq.f32(float %src) nounwind readnone 11 %rsq = call float @llvm.AMDGPU.rsq.f32(float %src) nounwind readnone
11 store float %rsq, float addrspace(1)* %out, align 4 12 store float %rsq, float addrspace(1)* %out, align 4
12 ret void 13 ret void
13 } 14 }
15
16 ; TODO: Really these should be constant folded
17 ; FUNC-LABEL: {{^}}rsq_f32_constant_4.0
18 ; SI: v_rsq_f32_e32 {{v[0-9]+}}, 4.0
19 ; EG: RECIPSQRT_IEEE
20 define void @rsq_f32_constant_4.0(float addrspace(1)* %out) nounwind {
21 %rsq = call float @llvm.AMDGPU.rsq.f32(float 4.0) nounwind readnone
22 store float %rsq, float addrspace(1)* %out, align 4
23 ret void
24 }
25
26 ; FUNC-LABEL: {{^}}rsq_f32_constant_100.0
27 ; SI: v_rsq_f32_e32 {{v[0-9]+}}, 0x42c80000
28 ; EG: RECIPSQRT_IEEE
29 define void @rsq_f32_constant_100.0(float addrspace(1)* %out) nounwind {
30 %rsq = call float @llvm.AMDGPU.rsq.f32(float 100.0) nounwind readnone
31 store float %rsq, float addrspace(1)* %out, align 4
32 ret void
33 }