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annotate test/CodeGen/R600/llvm.AMDGPU.rsq.ll @ 83:60c9769439b8

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LLVM 3.7
author Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
date Wed, 18 Feb 2015 14:55:36 +0900
parents 54457678186b
children
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60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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3 ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
54457678186b LLVM 3.6
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54457678186b LLVM 3.6
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5 declare float @llvm.AMDGPU.rsq.f32(float) nounwind readnone
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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7 ; FUNC-LABEL: {{^}}rsq_f32:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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8 ; SI: v_rsq_f32_e32 {{v[0-9]+}}, {{s[0-9]+}}
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9 ; EG: RECIPSQRT_IEEE
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10 define void @rsq_f32(float addrspace(1)* %out, float %src) nounwind {
54457678186b LLVM 3.6
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11 %rsq = call float @llvm.AMDGPU.rsq.f32(float %src) nounwind readnone
54457678186b LLVM 3.6
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12 store float %rsq, float addrspace(1)* %out, align 4
54457678186b LLVM 3.6
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13 ret void
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14 }
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60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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16 ; TODO: Really these should be constant folded
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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17 ; FUNC-LABEL: {{^}}rsq_f32_constant_4.0
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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18 ; SI: v_rsq_f32_e32 {{v[0-9]+}}, 4.0
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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19 ; EG: RECIPSQRT_IEEE
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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20 define void @rsq_f32_constant_4.0(float addrspace(1)* %out) nounwind {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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21 %rsq = call float @llvm.AMDGPU.rsq.f32(float 4.0) nounwind readnone
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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22 store float %rsq, float addrspace(1)* %out, align 4
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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23 ret void
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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24 }
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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26 ; FUNC-LABEL: {{^}}rsq_f32_constant_100.0
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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27 ; SI: v_rsq_f32_e32 {{v[0-9]+}}, 0x42c80000
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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28 ; EG: RECIPSQRT_IEEE
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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29 define void @rsq_f32_constant_100.0(float addrspace(1)* %out) nounwind {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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30 %rsq = call float @llvm.AMDGPU.rsq.f32(float 100.0) nounwind readnone
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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31 store float %rsq, float addrspace(1)* %out, align 4
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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32 ret void
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parents: 77
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33 }