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comparison lib/Target/X86/X86InstrInfo.h @ 100:7d135dc70f03

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children 1172e4bd9c6f
comparison
equal deleted inserted replaced
96:6418606d0ead 100:7d135dc70f03
262 /// can be interpreted as a query asking to find an operand that would be 262 /// can be interpreted as a query asking to find an operand that would be
263 /// commutable with the operand#1. 263 /// commutable with the operand#1.
264 bool findCommutedOpIndices(MachineInstr *MI, unsigned &SrcOpIdx1, 264 bool findCommutedOpIndices(MachineInstr *MI, unsigned &SrcOpIdx1,
265 unsigned &SrcOpIdx2) const override; 265 unsigned &SrcOpIdx2) const override;
266 266
267 /// Returns true if the routine could find two commutable operands
268 /// in the given FMA instruction. Otherwise, returns false.
269 ///
270 /// \p SrcOpIdx1 and \p SrcOpIdx2 are INPUT and OUTPUT arguments.
271 /// The output indices of the commuted operands are returned in these
272 /// arguments. Also, the input values of these arguments may be preset either
273 /// to indices of operands that must be commuted or be equal to a special
274 /// value 'CommuteAnyOperandIndex' which means that the corresponding
275 /// operand index is not set and this method is free to pick any of
276 /// available commutable operands.
277 ///
278 /// For example, calling this method this way:
279 /// unsigned Idx1 = 1, Idx2 = CommuteAnyOperandIndex;
280 /// findFMA3CommutedOpIndices(MI, Idx1, Idx2);
281 /// can be interpreted as a query asking if the operand #1 can be swapped
282 /// with any other available operand (e.g. operand #2, operand #3, etc.).
283 ///
284 /// The returned FMA opcode may differ from the opcode in the given MI.
285 /// For example, commuting the operands #1 and #3 in the following FMA
286 /// FMA213 #1, #2, #3
287 /// results into instruction with adjusted opcode:
288 /// FMA231 #3, #2, #1
289 bool findFMA3CommutedOpIndices(MachineInstr *MI,
290 unsigned &SrcOpIdx1,
291 unsigned &SrcOpIdx2) const;
292
293 /// Returns an adjusted FMA opcode that must be used in FMA instruction that
294 /// performs the same computations as the given MI but which has the operands
295 /// \p SrcOpIdx1 and \p SrcOpIdx2 commuted.
296 /// It may return 0 if it is unsafe to commute the operands.
297 ///
298 /// The returned FMA opcode may differ from the opcode in the given \p MI.
299 /// For example, commuting the operands #1 and #3 in the following FMA
300 /// FMA213 #1, #2, #3
301 /// results into instruction with adjusted opcode:
302 /// FMA231 #3, #2, #1
303 unsigned getFMA3OpcodeToCommuteOperands(MachineInstr *MI,
304 unsigned SrcOpIdx1,
305 unsigned SrcOpIdx2) const;
306
267 // Branch analysis. 307 // Branch analysis.
268 bool isUnpredicatedTerminator(const MachineInstr* MI) const override; 308 bool isUnpredicatedTerminator(const MachineInstr* MI) const override;
269 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 309 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
270 MachineBasicBlock *&FBB, 310 MachineBasicBlock *&FBB,
271 SmallVectorImpl<MachineOperand> &Cond, 311 SmallVectorImpl<MachineOperand> &Cond,
400 440
401 /// True if MI has a condition code def, e.g. EFLAGS, that is 441 /// True if MI has a condition code def, e.g. EFLAGS, that is
402 /// not marked dead. 442 /// not marked dead.
403 bool hasLiveCondCodeDef(MachineInstr *MI) const; 443 bool hasLiveCondCodeDef(MachineInstr *MI) const;
404 444
405 static bool isX86_64ExtendedReg(const MachineOperand &MO) {
406 if (!MO.isReg()) return false;
407 return X86II::isX86_64ExtendedReg(MO.getReg());
408 }
409
410 /// getGlobalBaseReg - Return a virtual register initialized with the 445 /// getGlobalBaseReg - Return a virtual register initialized with the
411 /// the global base register value. Output instructions required to 446 /// the global base register value. Output instructions required to
412 /// initialize the register in the function entry block, if necessary. 447 /// initialize the register in the function entry block, if necessary.
413 /// 448 ///
414 unsigned getGlobalBaseReg(MachineFunction *MF) const; 449 unsigned getGlobalBaseReg(MachineFunction *MF) const;
515 MachineInstr * convertToThreeAddressWithLEA(unsigned MIOpc, 550 MachineInstr * convertToThreeAddressWithLEA(unsigned MIOpc,
516 MachineFunction::iterator &MFI, 551 MachineFunction::iterator &MFI,
517 MachineBasicBlock::iterator &MBBI, 552 MachineBasicBlock::iterator &MBBI,
518 LiveVariables *LV) const; 553 LiveVariables *LV) const;
519 554
555 /// Handles memory folding for special case instructions, for instance those
556 /// requiring custom manipulation of the address.
557 MachineInstr *foldMemoryOperandCustom(MachineFunction &MF, MachineInstr *MI,
558 unsigned OpNum,
559 ArrayRef<MachineOperand> MOs,
560 MachineBasicBlock::iterator InsertPt,
561 unsigned Size, unsigned Align) const;
562
520 /// isFrameOperand - Return true and the FrameIndex if the specified 563 /// isFrameOperand - Return true and the FrameIndex if the specified
521 /// operand and follow operands form a reference to the stack frame. 564 /// operand and follow operands form a reference to the stack frame.
522 bool isFrameOperand(const MachineInstr *MI, unsigned int Op, 565 bool isFrameOperand(const MachineInstr *MI, unsigned int Op,
523 int &FrameIndex) const; 566 int &FrameIndex) const;
524 }; 567 };