Mercurial > hg > Members > tobaru > cbc > CbC_llvm
view test/CodeGen/AMDGPU/sgpr-copy-duplicate-operand.ll @ 128:c347d3398279 default tip
fix
author | mir3636 |
---|---|
date | Wed, 06 Dec 2017 14:37:17 +0900 |
parents | 803732b1fca8 |
children |
line wrap: on
line source
; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s ; Copy VGPR -> SGPR used twice as an instruction operand, which is then ; used in an REG_SEQUENCE that also needs to be handled. ; SI-LABEL: {{^}}test_dup_operands: ; SI: v_add_i32_e32 define amdgpu_kernel void @test_dup_operands(<2 x i32> addrspace(1)* noalias %out, <2 x i32> addrspace(1)* noalias %in) { %a = load <2 x i32>, <2 x i32> addrspace(1)* %in %lo = extractelement <2 x i32> %a, i32 0 %hi = extractelement <2 x i32> %a, i32 1 %add = add i32 %lo, %lo %vec0 = insertelement <2 x i32> undef, i32 %add, i32 0 %vec1 = insertelement <2 x i32> %vec0, i32 %hi, i32 1 store <2 x i32> %vec1, <2 x i32> addrspace(1)* %out, align 8 ret void }