view test/CodeGen/Hexagon/postinc-baseoffset.mir @ 128:c347d3398279 default tip

fix
author mir3636
date Wed, 06 Dec 2017 14:37:17 +0900
parents 803732b1fca8
children
line wrap: on
line source

# RUN: llc -march=hexagon -start-before hexagon-packetizer %s -o - | FileCheck %s

# Check that we don't packetize these two instructions together. It happened
# earlier because "offset" in the post-increment instruction was taken to be 8.

# CHECK: memw(r0+#0) = #-1
# CHECK: }
# CHECK: {
# CHECK: r1 = memw(r0++#8)

--- |
  define void @fred(i32* %a) { ret void }
...
---
name: fred
tracksRegLiveness: true

body: |
  bb.0:
    liveins: %r0
      S4_storeiri_io %r0, 0, -1 :: (store 4 into %ir.a)
      %r1, %r0 = L2_loadri_pi %r0, 8 :: (load 4 from %ir.a)