Mercurial > hg > RemoteEditor > vim7
annotate runtime/syntax/verilogams.vim @ 34:e170173ecb68 current-release
before ack base protocol.
author | Shinji KONO <kono@ie.u-ryukyu.ac.jp> |
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date | Wed, 26 Nov 2008 15:02:10 +0900 |
parents | 76efa0be13f1 |
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rev | line source |
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0 | 1 " Vim syntax file |
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2 " Language: Verilog-AMS |
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3 " Maintainer: S. Myles Prather <smprather@gmail.com> |
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4 " |
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5 " Version 1.1 S. Myles Prather <smprather@gmail.com> |
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6 " Moved some keywords to the type category. |
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7 " Added the metrix suffixes to the number matcher. |
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8 " Version 1.2 Prasanna Tamhankar <pratam@gmail.com> |
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9 " Minor reserved keyword updates. |
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10 " Last Update: Thursday September 15 15:36:03 CST 2005 |
0 | 11 |
12 " For version 5.x: Clear all syntax items | |
13 " For version 6.x: Quit when a syntax file was already loaded | |
14 if version < 600 | |
15 syntax clear | |
16 elseif exists("b:current_syntax") | |
17 finish | |
18 endif | |
19 | |
20 " Set the local value of the 'iskeyword' option | |
21 if version >= 600 | |
22 setlocal iskeyword=@,48-57,_,192-255 | |
23 else | |
24 set iskeyword=@,48-57,_,192-255 | |
25 endif | |
26 | |
27 " Annex B.1 'All keywords' | |
28 syn keyword verilogamsStatement above abs absdelay acos acosh ac_stim | |
29 syn keyword verilogamsStatement always analog analysis and asin | |
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30 syn keyword verilogamsStatement asinh assign atan atan2 atanh |
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31 syn keyword verilogamsStatement buf bufif0 bufif1 ceil cmos connectmodule |
0 | 32 syn keyword verilogamsStatement connectrules cos cosh cross ddt ddx deassign |
33 syn keyword verilogamsStatement defparam disable discipline | |
34 syn keyword verilogamsStatement driver_update edge enddiscipline | |
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35 syn keyword verilogamsStatement endconnectrules endmodule endfunction endgenerate |
0 | 36 syn keyword verilogamsStatement endnature endparamset endprimitive endspecify |
37 syn keyword verilogamsStatement endtable endtask event exp final_step | |
38 syn keyword verilogamsStatement flicker_noise floor flow force fork | |
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39 syn keyword verilogamsStatement function generate highz0 |
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40 syn keyword verilogamsStatement highz1 hypot idt idtmod if ifnone inf initial |
0 | 41 syn keyword verilogamsStatement initial_step inout input join |
42 syn keyword verilogamsStatement laplace_nd laplace_np laplace_zd laplace_zp | |
43 syn keyword verilogamsStatement large last_crossing limexp ln localparam log | |
44 syn keyword verilogamsStatement macromodule max medium min module nand nature | |
45 syn keyword verilogamsStatement negedge net_resolution nmos noise_table nor not | |
46 syn keyword verilogamsStatement notif0 notif1 or output paramset pmos | |
47 syn keyword verilogamsType parameter real integer electrical input output | |
48 syn keyword verilogamsType inout reg tri tri0 tri1 triand trior trireg | |
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49 syn keyword verilogamsType string from exclude aliasparam ground genvar |
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50 syn keyword verilogamsType branch time realtime |
0 | 51 syn keyword verilogamsStatement posedge potential pow primitive pull0 pull1 |
52 syn keyword verilogamsStatement pullup pulldown rcmos release | |
53 syn keyword verilogamsStatement rnmos rpmos rtran rtranif0 rtranif1 | |
54 syn keyword verilogamsStatement scalared sin sinh slew small specify specparam | |
55 syn keyword verilogamsStatement sqrt strong0 strong1 supply0 supply1 | |
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56 syn keyword verilogamsStatement table tan tanh task timer tran tranif0 |
0 | 57 syn keyword verilogamsStatement tranif1 transition |
58 syn keyword verilogamsStatement vectored wait wand weak0 weak1 | |
59 syn keyword verilogamsStatement white_noise wire wor wreal xnor xor zi_nd | |
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60 syn keyword verilogamsStatement zi_np zi_zd zi_zp |
0 | 61 syn keyword verilogamsRepeat forever repeat while for |
62 syn keyword verilogamsLabel begin end | |
63 syn keyword verilogamsConditional if else case casex casez default endcase | |
64 syn match verilogamsConstant ":inf"lc=1 | |
65 syn match verilogamsConstant "-inf"lc=1 | |
66 " Annex B.2 Discipline/nature | |
67 syn keyword verilogamsStatement abstol access continuous ddt_nature discrete | |
68 syn keyword verilogamsStatement domain idt_nature units | |
69 " Annex B.3 Connect Rules | |
70 syn keyword verilogamsStatement connect merged resolveto split | |
71 | |
72 syn match verilogamsOperator "[&|~><!)(*#%@+/=?:;}{,.\^\-\[\]]" | |
73 syn match verilogamsOperator "<+" | |
74 syn match verilogamsStatement "[vV]("me=e-1 | |
75 syn match verilogamsStatement "[iI]("me=e-1 | |
76 | |
77 syn keyword verilogamsTodo contained TODO | |
78 syn region verilogamsComment start="/\*" end="\*/" contains=verilogamsTodo | |
79 syn match verilogamsComment "//.*" contains=verilogamsTodo | |
80 | |
81 syn match verilogamsGlobal "`celldefine" | |
82 syn match verilogamsGlobal "`default_nettype" | |
83 syn match verilogamsGlobal "`define" | |
84 syn match verilogamsGlobal "`else" | |
85 syn match verilogamsGlobal "`elsif" | |
86 syn match verilogamsGlobal "`endcelldefine" | |
87 syn match verilogamsGlobal "`endif" | |
88 syn match verilogamsGlobal "`ifdef" | |
89 syn match verilogamsGlobal "`ifndef" | |
90 syn match verilogamsGlobal "`include" | |
91 syn match verilogamsGlobal "`line" | |
92 syn match verilogamsGlobal "`nounconnected_drive" | |
93 syn match verilogamsGlobal "`resetall" | |
94 syn match verilogamsGlobal "`timescale" | |
95 syn match verilogamsGlobal "`unconnected_drive" | |
96 syn match verilogamsGlobal "`undef" | |
97 syn match verilogamsSystask "$[a-zA-Z0-9_]\+\>" | |
98 | |
99 syn match verilogamsConstant "\<[A-Z][A-Z0-9_]\+\>" | |
100 | |
101 syn match verilogamsNumber "\(\<\d\+\|\)'[bB]\s*[0-1_xXzZ?]\+\>" | |
102 syn match verilogamsNumber "\(\<\d\+\|\)'[oO]\s*[0-7_xXzZ?]\+\>" | |
103 syn match verilogamsNumber "\(\<\d\+\|\)'[dD]\s*[0-9_xXzZ?]\+\>" | |
104 syn match verilogamsNumber "\(\<\d\+\|\)'[hH]\s*[0-9a-fA-F_xXzZ?]\+\>" | |
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105 syn match verilogamsNumber "\<[+-]\=[0-9_]\+\(\.[0-9_]*\|\)\(e[0-9_]*\|\)[TGMKkmunpfa]\=\>" |
0 | 106 |
107 syn region verilogamsString start=+"+ skip=+\\"+ end=+"+ contains=verilogamsEscape | |
108 syn match verilogamsEscape +\\[nt"\\]+ contained | |
109 syn match verilogamsEscape "\\\o\o\=\o\=" contained | |
110 | |
111 "Modify the following as needed. The trade-off is performance versus | |
112 "functionality. | |
113 syn sync lines=50 | |
114 | |
115 " Define the default highlighting. | |
116 " For version 5.7 and earlier: only when not done already | |
117 " For version 5.8 and later: only when an item doesn't have highlighting yet | |
118 if version >= 508 || !exists("did_verilogams_syn_inits") | |
119 if version < 508 | |
120 let did_verilogams_syn_inits = 1 | |
121 command -nargs=+ HiLink hi link <args> | |
122 else | |
123 command -nargs=+ HiLink hi def link <args> | |
124 endif | |
125 | |
126 " The default highlighting. | |
127 HiLink verilogamsCharacter Character | |
128 HiLink verilogamsConditional Conditional | |
129 HiLink verilogamsRepeat Repeat | |
130 HiLink verilogamsString String | |
131 HiLink verilogamsTodo Todo | |
132 HiLink verilogamsComment Comment | |
133 HiLink verilogamsConstant Constant | |
134 HiLink verilogamsLabel Label | |
135 HiLink verilogamsNumber Number | |
136 HiLink verilogamsOperator Special | |
137 HiLink verilogamsStatement Statement | |
138 HiLink verilogamsGlobal Define | |
139 HiLink verilogamsDirective SpecialComment | |
140 HiLink verilogamsEscape Special | |
141 HiLink verilogamsType Type | |
142 HiLink verilogamsSystask Function | |
143 | |
144 delcommand HiLink | |
145 endif | |
146 | |
147 let b:current_syntax = "verilogams" | |
148 | |
149 " vim: ts=8 |