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annotate lib/Target/ARM/ARMSelectionDAGInfo.h @ 120:1172e4bd9c6f

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update 4.0.0
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date Fri, 25 Nov 2016 19:14:25 +0900
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1 //===-- ARMSelectionDAGInfo.h - ARM SelectionDAG Info -----------*- C++ -*-===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file defines the ARM subclass for SelectionDAGTargetInfo.
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11 //
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12 //===----------------------------------------------------------------------===//
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13
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14 #ifndef LLVM_LIB_TARGET_ARM_ARMSELECTIONDAGINFO_H
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15 #define LLVM_LIB_TARGET_ARM_ARMSELECTIONDAGINFO_H
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16
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17 #include "MCTargetDesc/ARMAddressingModes.h"
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18 #include "llvm/CodeGen/RuntimeLibcalls.h"
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19 #include "llvm/CodeGen/SelectionDAGTargetInfo.h"
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20
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21 namespace llvm {
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22
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23 namespace ARM_AM {
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24 static inline ShiftOpc getShiftOpcForNode(unsigned Opcode) {
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25 switch (Opcode) {
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26 default: return ARM_AM::no_shift;
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27 case ISD::SHL: return ARM_AM::lsl;
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28 case ISD::SRL: return ARM_AM::lsr;
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29 case ISD::SRA: return ARM_AM::asr;
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30 case ISD::ROTR: return ARM_AM::ror;
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31 //case ISD::ROTL: // Only if imm -> turn into ROTR.
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32 // Can't handle RRX here, because it would require folding a flag into
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33 // the addressing mode. :( This causes us to miss certain things.
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34 //case ARMISD::RRX: return ARM_AM::rrx;
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35 }
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36 }
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37 } // end namespace ARM_AM
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38
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39 class ARMSelectionDAGInfo : public SelectionDAGTargetInfo {
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40 public:
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41 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl,
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42 SDValue Chain, SDValue Dst, SDValue Src,
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43 SDValue Size, unsigned Align, bool isVolatile,
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44 bool AlwaysInline,
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45 MachinePointerInfo DstPtrInfo,
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46 MachinePointerInfo SrcPtrInfo) const override;
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47
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48 SDValue
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49 EmitTargetCodeForMemmove(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain,
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50 SDValue Dst, SDValue Src, SDValue Size,
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51 unsigned Align, bool isVolatile,
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52 MachinePointerInfo DstPtrInfo,
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53 MachinePointerInfo SrcPtrInfo) const override;
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55 // Adjust parameters for memset, see RTABI section 4.3.4
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56 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl,
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57 SDValue Chain, SDValue Op1, SDValue Op2,
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58 SDValue Op3, unsigned Align, bool isVolatile,
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59 MachinePointerInfo DstPtrInfo) const override;
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60
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61 SDValue EmitSpecializedLibcall(SelectionDAG &DAG, const SDLoc &dl,
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62 SDValue Chain, SDValue Dst, SDValue Src,
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63 SDValue Size, unsigned Align,
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64 RTLIB::Libcall LC) const;
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65 };
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67 }
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69 #endif