Mercurial > hg > CbC > CbC_llvm

annotate test/CodeGen/AArch64/arm64-fast-isel-gv.ll @ 120:1172e4bd9c6f

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update 4.0.0
author mir3636
date Fri, 25 Nov 2016 19:14:25 +0900
parents afa8332a0e37
children 3a76565eade5
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc -O0 -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
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2
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3 ; Test load/store of global value from global offset table.
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4 @seed = common global i64 0, align 8
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5
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6 define void @Initrand() nounwind {
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7 entry:
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8 ; CHECK: @Initrand
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9 ; CHECK: adrp [[REG:x[0-9]+]], _seed@GOTPAGE
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10 ; CHECK: ldr [[REG2:x[0-9]+]], {{\[}}[[REG]], _seed@GOTPAGEOFF{{\]}}
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11 ; CHECK: str {{x[0-9]+}}, {{\[}}[[REG2]]{{\]}}
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12 store i64 74755, i64* @seed, align 8
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13 ret void
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14 }
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15
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16 define i32 @Rand() nounwind {
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17 entry:
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18 ; CHECK: @Rand
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19 ; CHECK: adrp [[REG1:x[0-9]+]], _seed@GOTPAGE
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20 ; CHECK: ldr [[REG2:x[0-9]+]], {{\[}}[[REG1]], _seed@GOTPAGEOFF{{\]}}
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1172e4bd9c6f update 4.0.0
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21 ; CHECK: mov [[REG3:x[0-9]+]], #13849
1172e4bd9c6f update 4.0.0
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22 ; CHECK: mov [[REG4:x[0-9]+]], #1309
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23 ; CHECK: ldr [[REG5:x[0-9]+]], {{\[}}[[REG2]]{{\]}}
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24 ; CHECK: mul [[REG6:x[0-9]+]], [[REG5]], [[REG4]]
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25 ; CHECK: add [[REG7:x[0-9]+]], [[REG6]], [[REG3]]
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26 ; CHECK: and [[REG8:x[0-9]+]], [[REG7]], #0xffff
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27 ; CHECK: str [[REG8]], {{\[}}[[REG1]]{{\]}}
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28 ; CHECK: ldr {{x[0-9]+}}, {{\[}}[[REG1]]{{\]}}
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29 %0 = load i64, i64* @seed, align 8
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30 %mul = mul nsw i64 %0, 1309
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31 %add = add nsw i64 %mul, 13849
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32 %and = and i64 %add, 65535
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33 store i64 %and, i64* @seed, align 8
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34 %1 = load i64, i64* @seed, align 8
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35 %conv = trunc i64 %1 to i32
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36 ret i32 %conv
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37 }