Mercurial > hg > CbC > CbC_llvm

annotate test/Transforms/LoopVectorize/if-pred-stores.ll @ 120:1172e4bd9c6f

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update 4.0.0
author mir3636
date Fri, 25 Nov 2016 19:14:25 +0900
parents afa8332a0e37
children 803732b1fca8
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
120
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1 ; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=1 -force-vector-interleave=2 -loop-vectorize -verify-loop-info -simplifycfg < %s | FileCheck %s --check-prefix=UNROLL
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2 ; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=1 -force-vector-interleave=2 -loop-vectorize -verify-loop-info < %s | FileCheck %s --check-prefix=UNROLL-NOSIMPLIFY
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3 ; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=2 -force-vector-interleave=1 -loop-vectorize -enable-cond-stores-vec -verify-loop-info -simplifycfg < %s | FileCheck %s --check-prefix=VEC
95
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4
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5 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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6
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7 ; Test predication of stores.
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8 define i32 @test(i32* nocapture %f) #0 {
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9 entry:
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10 br label %for.body
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11
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12 ; VEC-LABEL: test
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13 ; VEC: %[[v0:.+]] = add i64 %index, 0
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14 ; VEC: %[[v8:.+]] = icmp sgt <2 x i32> %{{.*}}, <i32 100, i32 100>
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15 ; VEC: %[[v9:.+]] = add nsw <2 x i32> %{{.*}}, <i32 20, i32 20>
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16 ; VEC: %[[v10:.+]] = and <2 x i1> %[[v8]], <i1 true, i1 true>
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17 ; VEC: %[[o1:.+]] = or <2 x i1> zeroinitializer, %[[v10]]
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18 ; VEC: %[[v11:.+]] = extractelement <2 x i1> %[[o1]], i32 0
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19 ; VEC: %[[v12:.+]] = icmp eq i1 %[[v11]], true
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20 ; VEC: br i1 %[[v12]], label %[[cond:.+]], label %[[else:.+]]
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21 ;
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22 ; VEC: [[cond]]:
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23 ; VEC: %[[v13:.+]] = extractelement <2 x i32> %[[v9]], i32 0
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24 ; VEC: %[[v2:.+]] = getelementptr inbounds i32, i32* %f, i64 %[[v0]]
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25 ; VEC: store i32 %[[v13]], i32* %[[v2]], align 4
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26 ; VEC: br label %[[else:.+]]
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27 ;
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28 ; VEC: [[else]]:
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29 ; VEC: %[[v15:.+]] = extractelement <2 x i1> %[[o1]], i32 1
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30 ; VEC: %[[v16:.+]] = icmp eq i1 %[[v15]], true
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31 ; VEC: br i1 %[[v16]], label %[[cond2:.+]], label %[[else2:.+]]
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32 ;
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33 ; VEC: [[cond2]]:
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34 ; VEC: %[[v17:.+]] = extractelement <2 x i32> %[[v9]], i32 1
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35 ; VEC: %[[v1:.+]] = add i64 %index, 1
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36 ; VEC: %[[v4:.+]] = getelementptr inbounds i32, i32* %f, i64 %[[v1]]
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37 ; VEC: store i32 %[[v17]], i32* %[[v4]], align 4
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38 ; VEC: br label %[[else2:.+]]
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39 ;
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40 ; VEC: [[else2]]:
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41
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42 ; UNROLL-LABEL: test
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43 ; UNROLL: vector.body:
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44 ; UNROLL: %[[IND:[a-zA-Z0-9]+]] = add i64 %{{.*}}, 0
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45 ; UNROLL: %[[IND1:[a-zA-Z0-9]+]] = add i64 %{{.*}}, 1
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46 ; UNROLL: %[[v0:[a-zA-Z0-9]+]] = getelementptr inbounds i32, i32* %f, i64 %[[IND]]
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47 ; UNROLL: %[[v1:[a-zA-Z0-9]+]] = getelementptr inbounds i32, i32* %f, i64 %[[IND1]]
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48 ; UNROLL: %[[v2:[a-zA-Z0-9]+]] = load i32, i32* %[[v0]], align 4
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49 ; UNROLL: %[[v3:[a-zA-Z0-9]+]] = load i32, i32* %[[v1]], align 4
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50 ; UNROLL: %[[v4:[a-zA-Z0-9]+]] = icmp sgt i32 %[[v2]], 100
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51 ; UNROLL: %[[v5:[a-zA-Z0-9]+]] = icmp sgt i32 %[[v3]], 100
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52 ; UNROLL: %[[o1:[a-zA-Z0-9]+]] = or i1 false, %[[v4]]
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53 ; UNROLL: %[[o2:[a-zA-Z0-9]+]] = or i1 false, %[[v5]]
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54 ; UNROLL: %[[v8:[a-zA-Z0-9]+]] = icmp eq i1 %[[o1]], true
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55 ; UNROLL: br i1 %[[v8]], label %[[cond:[a-zA-Z0-9.]+]], label %[[else:[a-zA-Z0-9.]+]]
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56 ;
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57 ; UNROLL: [[cond]]:
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58 ; UNROLL: %[[v6:[a-zA-Z0-9]+]] = add nsw i32 %[[v2]], 20
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59 ; UNROLL: store i32 %[[v6]], i32* %[[v0]], align 4
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60 ; UNROLL: br label %[[else]]
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61 ;
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62 ; UNROLL: [[else]]:
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63 ; UNROLL: %[[v9:[a-zA-Z0-9]+]] = icmp eq i1 %[[o2]], true
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64 ; UNROLL: br i1 %[[v9]], label %[[cond2:[a-zA-Z0-9.]+]], label %[[else2:[a-zA-Z0-9.]+]]
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65 ;
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66 ; UNROLL: [[cond2]]:
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67 ; UNROLL: %[[v7:[a-zA-Z0-9]+]] = add nsw i32 %[[v3]], 20
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68 ; UNROLL: store i32 %[[v7]], i32* %[[v1]], align 4
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69 ; UNROLL: br label %[[else2]]
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70 ;
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71 ; UNROLL: [[else2]]:
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72
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73 for.body:
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74 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.inc ]
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75 %arrayidx = getelementptr inbounds i32, i32* %f, i64 %indvars.iv
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76 %0 = load i32, i32* %arrayidx, align 4
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77 %cmp1 = icmp sgt i32 %0, 100
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78 br i1 %cmp1, label %if.then, label %for.inc
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79
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80 if.then:
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81 %add = add nsw i32 %0, 20
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82 store i32 %add, i32* %arrayidx, align 4
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83 br label %for.inc
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84
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85 for.inc:
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86 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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87 %exitcond = icmp eq i64 %indvars.iv.next, 128
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88 br i1 %exitcond, label %for.end, label %for.body
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89
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90 for.end:
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91 ret i32 0
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92 }
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93
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94 ; Track basic blocks when unrolling conditional blocks. This code used to assert
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95 ; because we did not update the phi nodes with the proper predecessor in the
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96 ; vectorized loop body.
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97 ; PR18724
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98
95
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99 ; UNROLL-NOSIMPLIFY-LABEL: bug18724
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100 ; UNROLL-NOSIMPLIFY: store i32
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101 ; UNROLL-NOSIMPLIFY: store i32
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102
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103 define void @bug18724() {
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104 entry:
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105 br label %for.body9
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106
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107 for.body9:
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108 br i1 undef, label %for.inc26, label %for.body14
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109
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110 for.body14:
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111 %indvars.iv3 = phi i64 [ %indvars.iv.next4, %for.inc23 ], [ undef, %for.body9 ]
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parents:
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112 %iNewChunks.120 = phi i32 [ %iNewChunks.2, %for.inc23 ], [ undef, %for.body9 ]
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113 %arrayidx16 = getelementptr inbounds [768 x i32], [768 x i32]* undef, i64 0, i64 %indvars.iv3
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114 %tmp = load i32, i32* %arrayidx16, align 4
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115 br i1 undef, label %if.then18, label %for.inc23
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116
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117 if.then18:
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118 store i32 2, i32* %arrayidx16, align 4
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119 %inc21 = add nsw i32 %iNewChunks.120, 1
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120 br label %for.inc23
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121
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122 for.inc23:
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parents:
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123 %iNewChunks.2 = phi i32 [ %inc21, %if.then18 ], [ %iNewChunks.120, %for.body14 ]
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diff changeset
124 %indvars.iv.next4 = add nsw i64 %indvars.iv3, 1
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125 %tmp1 = trunc i64 %indvars.iv3 to i32
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parents:
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126 %cmp13 = icmp slt i32 %tmp1, 0
54457678186b LLVM 3.6
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parents:
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127 br i1 %cmp13, label %for.body14, label %for.inc26
54457678186b LLVM 3.6
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parents:
diff changeset
128
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
129 for.inc26:
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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130 %iNewChunks.1.lcssa = phi i32 [ undef, %for.body9 ], [ %iNewChunks.2, %for.inc23 ]
54457678186b LLVM 3.6
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parents:
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131 unreachable
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
132 }