annotate llvm/test/CodeGen/AMDGPU/collapse-endcf-broken.mir @ 150:1d019706d866

LLVM10
author anatofuz
date Thu, 13 Feb 2020 15:10:13 +0900
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children 5f17cb93ff66
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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150
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1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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2 # RUN: llc -march=amdgcn -verify-machineinstrs -run-pass=si-optimize-exec-masking-pre-ra %s -o - | FileCheck -check-prefix=GXN %s
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3
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4 # FIXME: This is a miscompile, and the s_or_b64s need to be preserved.
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5
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6 ---
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7 name: invalid_end_cf_fold_0
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8 tracksRegLiveness: true
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9 liveins:
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10 - { reg: '$vgpr0', virtual-reg: '%0' }
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11 - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' }
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12 machineFunctionInfo:
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13 isEntryFunction: true
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14 body: |
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15 ; GXN-LABEL: name: invalid_end_cf_fold_0
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16 ; GXN: bb.0:
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17 ; GXN: successors: %bb.1(0x80000000)
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18 ; GXN: liveins: $vgpr0, $sgpr0_sgpr1
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19 ; GXN: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1
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20 ; GXN: $exec = S_OR_B64 $exec, [[COPY]], implicit-def $scc
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21 ; GXN: [[COPY1:%[0-9]+]]:sgpr_64 = COPY $exec
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22 ; GXN: bb.1:
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23 ; GXN: successors: %bb.2(0x80000000)
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24 ; GXN: bb.2:
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25 ; GXN: $exec = S_OR_B64 $exec, [[COPY1]], implicit-def $scc
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26 ; GXN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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27 ; GXN: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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28 ; GXN: DS_WRITE_B32 [[DEF]], [[DEF1]], 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3)
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29 ; GXN: S_ENDPGM 0
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30 bb.0:
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31 liveins: $vgpr0, $sgpr0_sgpr1
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32
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33 %0:sgpr_64 = COPY $sgpr0_sgpr1
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34 %1:sgpr_64 = COPY $exec
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35 $exec = S_OR_B64 $exec, %0, implicit-def $scc
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36 %2:sgpr_64 = COPY $exec
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37
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38 bb.1:
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39 $exec = S_OR_B64 $exec, %1, implicit-def $scc
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40
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41 bb.2:
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42 $exec = S_OR_B64 $exec, %2, implicit-def $scc
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43
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44 %5:vgpr_32 = IMPLICIT_DEF
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45 %6:vgpr_32 = IMPLICIT_DEF
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46 DS_WRITE_B32 %5, %6, 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3)
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47 S_ENDPGM 0
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48
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49 ...