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annotate llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.v.ll @ 221:79ff65ed7e25

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LLVM12 Original
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Tue, 15 Jun 2021 19:15:29 +0900
parents 1d019706d866
children c4bab56944e8
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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150
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1 ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP %s
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2 ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP %s
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79ff65ed7e25 LLVM12 Original
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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3 ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP %s
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4 ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,NOLOOP %s
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79ff65ed7e25 LLVM12 Original
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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5 ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,NOLOOP %s
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6
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7 ; GCN-LABEL: {{^}}gws_sema_v_offset0:
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8 ; NOLOOP-DAG: s_mov_b32 m0, 0{{$}}
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9 ; NOLOOP: ds_gws_sema_v gds{{$}}
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10
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11 ; LOOP: s_mov_b32 m0, 0{{$}}
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12 ; LOOP: [[LOOP:BB[0-9]+_[0-9]+]]:
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13 ; LOOP-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_TRAPSTS, 8, 1), 0
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14 ; LOOP-NEXT: ds_gws_sema_v gds
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15 ; LOOP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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16 ; LOOP-NEXT: s_getreg_b32 [[GETREG:s[0-9]+]], hwreg(HW_REG_TRAPSTS, 8, 1)
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17 ; LOOP-NEXT: s_cmp_lg_u32 [[GETREG]], 0
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18 ; LOOP-NEXT: s_cbranch_scc1 [[LOOP]]
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19 define amdgpu_kernel void @gws_sema_v_offset0(i32 %val) #0 {
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20 call void @llvm.amdgcn.ds.gws.sema.v(i32 0)
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21 ret void
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22 }
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23
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24 declare void @llvm.amdgcn.ds.gws.sema.v(i32) #0
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25
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26 attributes #0 = { convergent inaccessiblememonly nounwind }