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150
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1 # RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass=si-peephole-sdwa -o - %s | FileCheck -check-prefix=GFX9 %s
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2 # RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs -run-pass=si-peephole-sdwa -o - %s | FileCheck -check-prefix=GFX9 %s
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3
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4 # test for 3 consecutive _sdwa's
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5 # GFX9-LABEL: name: test1_add_co_sdwa
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221
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6 # GFX9: = nsw V_ADD_CO_U32_sdwa
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7 # GFX9-NEXT: = nuw V_ADDC_U32_e32
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8 # GFX9: V_ADD_CO_U32_sdwa
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150
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9 # GFX9-NEXT: V_ADDC_U32_e32
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221
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10 # GFX9: V_ADD_CO_U32_sdwa
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150
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11 # GFX9-NEXT: V_ADDC_U32_e32
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12 ---
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13 name: test1_add_co_sdwa
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14 tracksRegLiveness: true
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15 registers:
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16 - { id: 0, class: vgpr_32, preferred-register: '' }
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17 liveins:
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18 - { reg: '$vgpr0', virtual-reg: '%0' }
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19 - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' }
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20 body: |
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21 bb.0:
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22 liveins: $vgpr0, $sgpr0_sgpr1
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23
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24 %1:sgpr_64 = COPY $sgpr0_sgpr1
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25 %0:vgpr_32 = COPY $vgpr0
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26 %22:sreg_32_xm0 = S_MOV_B32 255
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27 %23:vgpr_32 = V_AND_B32_e32 %22, %0, implicit $exec
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28 %30:vreg_64 = COPY $sgpr0_sgpr1
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221
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29 %63:vgpr_32, %65:sreg_64_xexec = nsw V_ADD_CO_U32_e64 %30.sub0, %23, 0, implicit $exec
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30 %64:vgpr_32, dead %66:sreg_64_xexec = nuw V_ADDC_U32_e64 %30.sub1, %0, killed %65, 0, implicit $exec
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150
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31 %62:vreg_64 = REG_SEQUENCE %63, %subreg.sub0, %64, %subreg.sub1
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221
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32 GLOBAL_STORE_DWORDX2_SADDR %30.sub0, %62, %1, 0, 0, implicit $exec, implicit $exec :: (store 8)
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150
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33
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34 %161:vgpr_32 = V_AND_B32_e32 %22, %0, implicit $exec
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221
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35 %163:vgpr_32, %165:sreg_64_xexec = V_ADD_CO_U32_e64 %30.sub0, %161, 0, implicit $exec
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150
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36 %164:vgpr_32, dead %166:sreg_64_xexec = V_ADDC_U32_e64 %30.sub1, %0, killed %165, 0, implicit $exec
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37 %162:vreg_64 = REG_SEQUENCE %163, %subreg.sub0, %164, %subreg.sub1
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221
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38 GLOBAL_STORE_DWORDX2_SADDR %30.sub0, %162, %1, 0, 0, implicit $exec, implicit $exec :: (store 8)
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150
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39
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40 %171:vgpr_32 = V_AND_B32_e32 %22, %0, implicit $exec
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221
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41 %173:vgpr_32, %175:sreg_64_xexec = V_ADD_CO_U32_e64 %30.sub0, %171, 0, implicit $exec
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150
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42 %174:vgpr_32, dead %176:sreg_64_xexec = V_ADDC_U32_e64 %30.sub1, %0, killed %175, 0, implicit $exec
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43 %172:vreg_64 = REG_SEQUENCE %173, %subreg.sub0, %174, %subreg.sub1
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221
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44 GLOBAL_STORE_DWORDX2_SADDR %30.sub0, %172, %1, 0, 0, implicit $exec, implicit $exec :: (store 8)
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150
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45
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46 ...
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47
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48 # test for VCC interference on sdwa, should generate 1 xform only
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49 # GFX9-LABEL: name: test2_add_co_sdwa
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221
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50 # GFX9: V_ADD_CO_U32_sdwa
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150
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51 # GFX9: V_ADDC_U32_e32
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221
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52 # GFX9-NOT: V_ADD_CO_U32_sdwa
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150
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53 # GFX9-NOT: V_ADDC_U32_e32
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54 ---
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55 name: test2_add_co_sdwa
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56 tracksRegLiveness: true
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57 registers:
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58 - { id: 0, class: vgpr_32, preferred-register: '' }
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59 liveins:
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60 - { reg: '$vgpr0', virtual-reg: '%0' }
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61 - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' }
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62 body: |
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63 bb.0:
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64 liveins: $vgpr0, $sgpr0_sgpr1
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65
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66 %1:sgpr_64 = COPY $sgpr0_sgpr1
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67 %0:vgpr_32 = COPY $vgpr0
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68 %22:sreg_32_xm0 = S_MOV_B32 255
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69 %23:vgpr_32 = V_AND_B32_e32 %22, %0, implicit $exec
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70 %30:vreg_64 = COPY $sgpr0_sgpr1
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221
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71 %63:vgpr_32, %65:sreg_64_xexec = V_ADD_CO_U32_e64 %30.sub0, %23, 0, implicit $exec
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150
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72
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73 %161:vgpr_32 = V_AND_B32_e32 %22, %0, implicit $exec
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221
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74 %163:vgpr_32, %165:sreg_64_xexec = V_ADD_CO_U32_e64 %30.sub0, %161, 0, implicit $exec
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150
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75 %164:vgpr_32, dead %166:sreg_64_xexec = V_ADDC_U32_e64 %30.sub1, %0, killed %165, 0, implicit $exec
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76 %162:vreg_64 = REG_SEQUENCE %163, %subreg.sub0, %164, %subreg.sub1
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77
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78 %64:vgpr_32, dead %66:sreg_64_xexec = V_ADDC_U32_e64 %30.sub1, %0, killed %65, 0, implicit $exec
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79 %62:vreg_64 = REG_SEQUENCE %63, %subreg.sub0, %64, %subreg.sub1
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221
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80 GLOBAL_STORE_DWORDX2_SADDR %30.sub0, %62, %1, 0, 0, implicit $exec, implicit $exec :: (store 8)
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150
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81
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82 %161:vgpr_32 = V_AND_B32_e32 %22, %0, implicit $exec
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221
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83 %163:vgpr_32, %165:sreg_64_xexec = V_ADD_CO_U32_e64 %30.sub0, %161, 0, implicit $exec
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150
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84 %164:vgpr_32, dead %166:sreg_64_xexec = V_ADDC_U32_e64 %30.sub1, %0, killed %165, 0, implicit $exec
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85 %162:vreg_64 = REG_SEQUENCE %163, %subreg.sub0, %164, %subreg.sub1
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221
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86 GLOBAL_STORE_DWORDX2_SADDR %30.sub0, %162, %1, 0, 0, implicit $exec, implicit $exec :: (store 8)
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150
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87
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88 ...
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89
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90 # test for CarryOut used, should reject
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91 # GFX9-LABEL: name: test3_add_co_sdwa
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221
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92 # GFX9: V_ADD_CO_U32_e64
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150
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93 # GFX9: V_ADDC_U32_e64
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221
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94 # GFX9-NOT: V_ADD_CO_U32_sdwa
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150
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95 # GFX9-NOT: V_ADDC_U32_e32
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96 ---
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97 name: test3_add_co_sdwa
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98 tracksRegLiveness: true
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99 registers:
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100 - { id: 0, class: vgpr_32, preferred-register: '' }
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101 liveins:
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102 - { reg: '$vgpr0', virtual-reg: '%0' }
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103 - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' }
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104 body: |
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105 bb.0:
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106 liveins: $vgpr0, $sgpr0_sgpr1
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107
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108 %1:sgpr_64 = COPY $sgpr0_sgpr1
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109 %0:vgpr_32 = COPY $vgpr0
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110 %22:sreg_32_xm0 = S_MOV_B32 255
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111 %23:vgpr_32 = V_AND_B32_e32 %22, %0, implicit $exec
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112 %30:vreg_64 = COPY $sgpr0_sgpr1
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221
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113 %63:vgpr_32, %65:sreg_64_xexec = V_ADD_CO_U32_e64 %30.sub0, %23, 0, implicit $exec
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150
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114 %64:vgpr_32, %66:sreg_64_xexec = V_ADDC_U32_e64 %30.sub1, %0, killed %65, 0, implicit $exec
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115 %62:vreg_64 = REG_SEQUENCE %63, %subreg.sub0, %66, %subreg.sub1
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221
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116 GLOBAL_STORE_DWORDX2_SADDR %30.sub0, %62, %1, 0, 0, implicit $exec, implicit $exec :: (store 8)
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150
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117
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118 ...
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119
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120 # test for CarryIn used more than once, should reject
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121 # GFX9-LABEL: name: test4_add_co_sdwa
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221
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122 # GFX9: V_ADD_CO_U32_e64
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150
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123 # GFX9: V_ADDC_U32_e64
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221
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124 # GFX9-NOT: V_ADD_CO_U32_sdwa
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150
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125 # GFX9-NOT: V_ADDC_U32_e32
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126 ---
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127 name: test4_add_co_sdwa
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128 tracksRegLiveness: true
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129 registers:
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130 - { id: 0, class: vgpr_32, preferred-register: '' }
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131 liveins:
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132 - { reg: '$vgpr0', virtual-reg: '%0' }
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133 - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' }
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134 body: |
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135 bb.0:
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136 liveins: $vgpr0, $sgpr0_sgpr1
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137
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138 %1:sgpr_64 = COPY $sgpr0_sgpr1
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139 %0:vgpr_32 = COPY $vgpr0
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140 %22:sreg_32_xm0 = S_MOV_B32 255
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141 %23:vgpr_32 = V_AND_B32_e32 %22, %0, implicit $exec
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142 %30:vreg_64 = COPY $sgpr0_sgpr1
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221
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143 %63:vgpr_32, %65:sreg_64_xexec = V_ADD_CO_U32_e64 %30.sub0, %23, 0, implicit $exec
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150
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144 %64:vgpr_32, %66:sreg_64_xexec = V_ADDC_U32_e64 %30.sub1, %0, %65, 0, implicit $exec
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145 %62:vreg_64 = REG_SEQUENCE %63, %subreg.sub0, %65, %subreg.sub1
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221
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146 GLOBAL_STORE_DWORDX2_SADDR %30.sub0, %62, %1, 0, 0, implicit $exec, implicit $exec :: (store 8)
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150
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147
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148
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149 ...
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150
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151 # test for simple example, should generate sdwa
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152 # GFX9-LABEL: name: test5_add_co_sdwa
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221
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153 # GFX9: V_ADD_CO_U32_sdwa
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150
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154 # GFX9: V_ADDC_U32_e32
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155 ---
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156 name: test5_add_co_sdwa
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157 tracksRegLiveness: true
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158 registers:
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159 - { id: 0, class: vgpr_32, preferred-register: '' }
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160 liveins:
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161 - { reg: '$vgpr0', virtual-reg: '%0' }
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162 - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' }
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163 body: |
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164 bb.0:
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165 liveins: $vgpr0, $sgpr0_sgpr1
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166
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167 %1:sgpr_64 = COPY $sgpr0_sgpr1
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168 %0:vgpr_32 = COPY $vgpr0
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169 %22:sreg_32_xm0 = S_MOV_B32 255
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170 %23:vgpr_32 = V_AND_B32_e32 %22, %0, implicit $exec
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171 %30:vreg_64 = COPY $sgpr0_sgpr1
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221
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172 %63:vgpr_32, %65:sreg_64_xexec = V_ADD_CO_U32_e64 %30.sub0, %23, 0, implicit $exec
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150
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173 %64:vgpr_32, %66:sreg_64_xexec = V_ADDC_U32_e64 %30.sub1, %0, %65, 0, implicit $exec
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174 %62:vreg_64 = REG_SEQUENCE %63, %subreg.sub0, %64, %subreg.sub1
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221
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175 GLOBAL_STORE_DWORDX2_SADDR %30.sub0, %62, %1, 0, 0, implicit $exec, implicit $exec :: (store 8)
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150
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176
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177
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178 ...
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179
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221
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180 # test for V_ADD_CO_U32_e64 only, should reject
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150
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181 # GFX9-LABEL: name: test6_add_co_sdwa
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221
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182 # GFX9: V_ADD_CO_U32_e64
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183 # GFX9-NOT: V_ADD_CO_U32_sdwa
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150
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184 # GFX9-NOT: V_ADDC_U32_e32
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185 ---
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186 name: test6_add_co_sdwa
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187 tracksRegLiveness: true
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188 registers:
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189 - { id: 0, class: vgpr_32, preferred-register: '' }
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190 liveins:
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191 - { reg: '$vgpr0', virtual-reg: '%0' }
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192 - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' }
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193 body: |
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194 bb.0:
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195 liveins: $vgpr0, $sgpr0_sgpr1
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196
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197 %1:sgpr_64 = COPY $sgpr0_sgpr1
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198 %0:vgpr_32 = COPY $vgpr0
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199 %22:sreg_32_xm0 = S_MOV_B32 255
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200 %23:vgpr_32 = V_AND_B32_e32 %22, %0, implicit $exec
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201 %30:vreg_64 = COPY $sgpr0_sgpr1
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221
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202 %63:vgpr_32, %65:sreg_64_xexec = V_ADD_CO_U32_e64 %30.sub0, %23, 0, implicit $exec
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150
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203 %62:vreg_64 = REG_SEQUENCE %63, %subreg.sub0, %23, %subreg.sub1
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221
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204 GLOBAL_STORE_DWORDX2_SADDR %30.sub0, %62, %1, 0, 0, implicit $exec, implicit $exec :: (store 8)
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150
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205
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206
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207 ...
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208
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209 # test for V_ADDC_U32_e64 only, should reject
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210 # GFX9-LABEL: name: test7_add_co_sdwa
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211 # GFX9: V_ADDC_U32_e64
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221
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212 # GFX9-NOT: V_ADD_CO_U32_sdwa
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150
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213 # GFX9-NOT: V_ADDC_U32_e32
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214 ---
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215 name: test7_add_co_sdwa
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216 tracksRegLiveness: true
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217 registers:
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218 - { id: 0, class: vgpr_32, preferred-register: '' }
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219 liveins:
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220 - { reg: '$vgpr0', virtual-reg: '%0' }
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221 - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' }
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222 body: |
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223 bb.0:
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224 liveins: $vgpr0, $sgpr0_sgpr1
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225
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226 %1:sgpr_64 = COPY $sgpr0_sgpr1
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227 %0:vgpr_32 = COPY $vgpr0
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228 %22:sreg_32_xm0 = S_MOV_B32 255
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229 %23:vgpr_32 = V_AND_B32_e32 %22, %0, implicit $exec
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230 %24:sreg_64_xexec = COPY $sgpr0_sgpr1
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231
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232 %30:vreg_64 = COPY $sgpr0_sgpr1
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233 %64:vgpr_32, %66:sreg_64_xexec = V_ADDC_U32_e64 %30.sub1, %0, %24, 0, implicit $exec
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234 %62:vreg_64 = REG_SEQUENCE %23, %subreg.sub0, %23, %subreg.sub1
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221
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235 GLOBAL_STORE_DWORDX2_SADDR %30.sub0, %62, %1, 0, 0, implicit $exec, implicit $exec :: (store 8)
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150
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236
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237
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238 ...
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239
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240 # test for $vcc defined between two adds, should not generate
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241 # GFX9-LABEL: name: test8_add_co_sdwa
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221
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242 # GFX9-NOT: V_ADD_CO_U32_sdwa
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150
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243 # GFX9: V_ADDC_U32_e64
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244 ---
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245 name: test8_add_co_sdwa
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246 tracksRegLiveness: true
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247 registers:
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248 - { id: 0, class: vgpr_32, preferred-register: '' }
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249 liveins:
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250 - { reg: '$vgpr0', virtual-reg: '%0' }
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251 - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' }
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252 body: |
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253 bb.0:
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254 liveins: $vgpr0, $sgpr0_sgpr1
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255
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256 %1:sgpr_64 = COPY $sgpr0_sgpr1
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257 %0:vgpr_32 = COPY $vgpr0
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258 %22:sreg_32_xm0 = S_MOV_B32 255
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259 %23:vgpr_32 = V_AND_B32_e32 %22, %0, implicit $exec
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260 %30:vreg_64 = COPY $sgpr0_sgpr1
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221
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261 %63:vgpr_32, %65:sreg_64_xexec = V_ADD_CO_U32_e64 %30.sub0, %23, 0, implicit $exec
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150
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262 $vcc = COPY %30
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263 %64:vgpr_32, %66:sreg_64_xexec = V_ADDC_U32_e64 %30.sub1, %0, %65, 0, implicit $exec
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264 %31:vreg_64 = COPY $vcc
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265 %62:vreg_64 = REG_SEQUENCE %63, %subreg.sub0, %64, %subreg.sub1
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221
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266 GLOBAL_STORE_DWORDX2_SADDR %31.sub0, %62, %1, 0, 0, implicit $exec, implicit $exec :: (store 8)
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150
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267
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268
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269 ...
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270
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271 # test for non dead $vcc, should not generate
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272 # GFX9-LABEL: name: test9_add_co_sdwa
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221
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273 # GFX9-NOT: V_ADD_CO_U32_sdwa
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150
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274 # GFX9: V_ADDC_U32_e64
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275 ---
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276 name: test9_add_co_sdwa
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277 tracksRegLiveness: true
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278 registers:
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279 - { id: 0, class: vgpr_32, preferred-register: '' }
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280 liveins:
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281 - { reg: '$vgpr0', virtual-reg: '%0' }
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282 - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' }
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283 body: |
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284 bb.0:
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285 liveins: $vgpr0, $sgpr0_sgpr1
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286
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287 %1:sgpr_64 = COPY $sgpr0_sgpr1
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288 %0:vgpr_32 = COPY $vgpr0
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289 %22:sreg_32_xm0 = S_MOV_B32 255
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290 %30:vreg_64 = COPY $sgpr0_sgpr1
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291 $vcc = COPY %30
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292 %23:vgpr_32 = V_AND_B32_e32 %22, %0, implicit $exec
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221
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293 %63:vgpr_32, %65:sreg_64_xexec = V_ADD_CO_U32_e64 %30.sub0, %23, 0, implicit $exec
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150
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294 %64:vgpr_32, %66:sreg_64_xexec = V_ADDC_U32_e64 %30.sub1, %0, %65, 0, implicit $exec
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295 %31:vreg_64 = COPY $vcc
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296 %62:vreg_64 = REG_SEQUENCE %63, %subreg.sub0, %64, %subreg.sub1
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221
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297 GLOBAL_STORE_DWORDX2_SADDR %31.sub0, %62, %1, 0, 0, implicit $exec, implicit $exec :: (store 8)
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298
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150
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299
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300 ...
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301
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302 # test for def $vcc_lo, should not generate
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303 # GFX9-LABEL: name: test10_add_co_sdwa
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221
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304 # GFX9-NOT: V_ADD_CO_U32_sdwa
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150
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305 # GFX9: V_ADDC_U32_e64
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306 ---
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307 name: test10_add_co_sdwa
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308 tracksRegLiveness: true
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309 registers:
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310 - { id: 0, class: vgpr_32, preferred-register: '' }
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311 liveins:
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312 - { reg: '$vgpr0', virtual-reg: '%0' }
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313 - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' }
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314 body: |
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315 bb.0:
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316 liveins: $vgpr0, $sgpr0_sgpr1
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317
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318 %1:sgpr_64 = COPY $sgpr0_sgpr1
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319 %0:vgpr_32 = COPY $vgpr0
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320 %22:sreg_32_xm0 = S_MOV_B32 255
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321 %30:vreg_64 = COPY $sgpr0_sgpr1
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322 $vcc_lo = COPY %30.sub0
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323 %23:vgpr_32 = V_AND_B32_e32 %22, %0, implicit $exec
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221
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324 %63:vgpr_32, %65:sreg_64_xexec = V_ADD_CO_U32_e64 %30.sub0, %23, 0, implicit $exec
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150
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325 %31:vgpr_32 = COPY $vcc_lo
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326 %32:vreg_64 = REG_SEQUENCE %31, %subreg.sub0, %23, %subreg.sub1
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327 %64:vgpr_32, %66:sreg_64_xexec = V_ADDC_U32_e64 %30.sub1, %0, %65, 0, implicit $exec
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328 %62:vreg_64 = REG_SEQUENCE %63, %subreg.sub0, %64, %subreg.sub1
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221
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329 GLOBAL_STORE_DWORDX2_SADDR %32.sub0, %62, %1, 0, 0, implicit $exec, implicit $exec :: (store 8)
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150
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330
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331 ...
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332
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333 # test for read $vcc_hi, should not generate
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334 # GFX9-LABEL: name: test11_add_co_sdwa
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221
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335 # GFX9-NOT: V_ADD_CO_U32_sdwa
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150
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336 # GFX9: V_ADDC_U32_e64
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337 ---
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338 name: test11_add_co_sdwa
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339 tracksRegLiveness: true
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340 registers:
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341 - { id: 0, class: vgpr_32, preferred-register: '' }
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342 liveins:
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343 - { reg: '$vgpr0', virtual-reg: '%0' }
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344 - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' }
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345 body: |
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346 bb.0:
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347 liveins: $vgpr0, $sgpr0_sgpr1
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348
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349 %1:sgpr_64 = COPY $sgpr0_sgpr1
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350 %0:vgpr_32 = COPY $vgpr0
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351 %22:sreg_32_xm0 = S_MOV_B32 255
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352 %30:vreg_64 = COPY $sgpr0_sgpr1
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353 $vcc_hi = COPY %30.sub0
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354 %23:vgpr_32 = V_AND_B32_e32 %22, %0, implicit $exec
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221
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355 %63:vgpr_32, %65:sreg_64_xexec = V_ADD_CO_U32_e64 %30.sub0, %23, 0, implicit $exec
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150
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356 %31:vgpr_32 = COPY $vcc_hi
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357 %32:vreg_64 = REG_SEQUENCE %31, %subreg.sub0, %23, %subreg.sub1
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358 %64:vgpr_32, %66:sreg_64_xexec = V_ADDC_U32_e64 %30.sub1, %0, %65, 0, implicit $exec
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359 %62:vreg_64 = REG_SEQUENCE %63, %subreg.sub0, %64, %subreg.sub1
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221
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360 GLOBAL_STORE_DWORDX2_SADDR %32.sub0, %62, %1, 0, 0, implicit $exec, implicit $exec :: (store 8)
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|
150
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361
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362 ...
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363
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364 # test for $vcc defined and used between adds, should not generate
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365 # GFX9-LABEL: name: test12_add_co_sdwa
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221
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366 # GFX9-NOT: V_ADD_CO_U32_sdwa
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150
|
367 # GFX9: V_ADDC_U32_e64
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368 ---
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369 name: test12_add_co_sdwa
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370 tracksRegLiveness: true
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371 registers:
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372 - { id: 0, class: vgpr_32, preferred-register: '' }
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373 liveins:
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374 - { reg: '$vgpr0', virtual-reg: '%0' }
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375 - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' }
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376 body: |
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377 bb.0:
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378 liveins: $vgpr0, $sgpr0_sgpr1
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379
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380 %1:sgpr_64 = COPY $sgpr0_sgpr1
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381 %0:vgpr_32 = COPY $vgpr0
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382 %22:sreg_32_xm0 = S_MOV_B32 255
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383 %30:vreg_64 = COPY $sgpr0_sgpr1
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384 %23:vgpr_32 = V_AND_B32_e32 %22, %0, implicit $exec
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221
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385 %63:vgpr_32, %65:sreg_64_xexec = V_ADD_CO_U32_e64 %30.sub0, %23, 0, implicit $exec
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|
150
|
386 $vcc = COPY %30
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387 %31:vreg_64 = COPY killed $vcc
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388 %64:vgpr_32, %66:sreg_64_xexec = V_ADDC_U32_e64 %30.sub1, %0, %65, 0, implicit $exec
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389 %62:vreg_64 = REG_SEQUENCE %63, %subreg.sub0, %64, %subreg.sub1
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|
221
|
390 GLOBAL_STORE_DWORDX2_SADDR %31.sub0, %62, %1, 0, 0, implicit $exec, implicit $exec :: (store 8)
|
|
150
|
391
|
