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annotate test/CodeGen/AMDGPU/select.ll @ 121:803732b1fca8

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LLVM 5.0
author kono
date Fri, 27 Oct 2017 17:07:41 +0900
parents afa8332a0e37
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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2
0
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4 ; Normally icmp + select is optimized to select_cc, when this happens the
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5 ; DAGLegalizer never sees the select and doesn't have a chance to leaglize it.
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6 ;
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7 ; In order to avoid the select_cc optimization, this test case calculates the
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8 ; condition for the select in a separate basic block.
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60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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10 ; FUNC-LABEL: {{^}}select:
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54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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11 ; EG-DAG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.X
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12 ; EG-DAG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.X
54457678186b LLVM 3.6
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13 ; EG-DAG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.XY
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14 ; EG-DAG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.XY
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15 ; EG-DAG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.XYZW
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16 ; EG-DAG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.XYZW
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803732b1fca8 LLVM 5.0
kono
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17 define amdgpu_kernel void @select (i32 addrspace(1)* %i32out, float addrspace(1)* %f32out,
0
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18 <2 x i32> addrspace(1)* %v2i32out, <2 x float> addrspace(1)* %v2f32out,
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19 <4 x i32> addrspace(1)* %v4i32out, <4 x float> addrspace(1)* %v4f32out,
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20 i32 %cond) {
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21 entry:
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22 br label %for
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23 body:
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24 %inc = add i32 %i, 1
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25 %br_cmp.i = icmp eq i1 %br_cmp, 0
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26 br label %for
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27 for:
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28 %i = phi i32 [ %inc, %body], [ 0, %entry ]
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29 %br_cmp = phi i1 [ %br_cmp.i, %body ], [ 0, %entry ]
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30 %0 = icmp eq i32 %cond, %i
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31 %1 = select i1 %br_cmp, i32 2, i32 3
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32 %2 = select i1 %br_cmp, float 2.0 , float 5.0
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33 %3 = select i1 %br_cmp, <2 x i32> <i32 2, i32 3>, <2 x i32> <i32 4, i32 5>
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34 %4 = select i1 %br_cmp, <2 x float> <float 2.0, float 3.0>, <2 x float> <float 4.0, float 5.0>
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35 %5 = select i1 %br_cmp, <4 x i32> <i32 2 , i32 3, i32 4, i32 5>, <4 x i32> <i32 6, i32 7, i32 8, i32 9>
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36 %6 = select i1 %br_cmp, <4 x float> <float 2.0, float 3.0, float 4.0, float 5.0>, <4 x float> <float 6.0, float 7.0, float 8.0, float 9.0>
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37 br i1 %0, label %body, label %done
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38
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39 done:
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40 store i32 %1, i32 addrspace(1)* %i32out
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41 store float %2, float addrspace(1)* %f32out
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42 store <2 x i32> %3, <2 x i32> addrspace(1)* %v2i32out
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43 store <2 x float> %4, <2 x float> addrspace(1)* %v2f32out
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44 store <4 x i32> %5, <4 x i32> addrspace(1)* %v4i32out
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45 store <4 x float> %6, <4 x float> addrspace(1)* %v4f32out
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46 ret void
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47 }