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121
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1 # RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-shrink-instructions -o - %s | FileCheck -check-prefix=GCN %s
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2 ...
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3 # GCN-LABEL: name: fold_imm_non_ssa{{$}}
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134
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4 # GCN: %0:vgpr_32 = V_MOV_B32_e32 123, implicit $exec
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5 # GCN: %2:vgpr_32 = V_ADD_I32_e32 456, %0, implicit-def $vcc, implicit $exec
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121
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6
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7 name: fold_imm_non_ssa
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8 tracksRegLiveness: true
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9 registers:
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10 - { id: 0, class: vgpr_32 }
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11 - { id: 1, class: vgpr_32 }
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12 - { id: 2, class: vgpr_32 }
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13 - { id: 3, class: sreg_64 }
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14 body: |
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15 bb.0:
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16 %0 = COPY undef %0
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134
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17 %0 = V_MOV_B32_e32 123, implicit $exec
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18 %1 = V_MOV_B32_e32 456, implicit $exec
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147
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19 %2, $vcc = V_ADD_I32_e64 %0, %1, 0, implicit $exec
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20 S_ENDPGM 0
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121
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21
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22 ...
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23 # GCN-LABEL: name: fold_partially_defined_superreg{{$}}
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134
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24 # GCN: %1:vgpr_32 = V_MOV_B32_e32 456, implicit $exec
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25 # GCN: %2:vgpr_32 = V_ADD_I32_e32 123, %1, implicit-def $vcc, implicit $exec
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121
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26 name: fold_partially_defined_superreg
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27 tracksRegLiveness: true
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28 registers:
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29 - { id: 0, class: vgpr_32 }
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30 - { id: 1, class: vgpr_32 }
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31 - { id: 2, class: vgpr_32 }
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32 - { id: 3, class: vreg_64 }
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33 body: |
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34 bb.0:
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134
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35 undef %3.sub0 = V_MOV_B32_e32 123, implicit $exec, implicit-def %3
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36 %1 = V_MOV_B32_e32 456, implicit $exec
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147
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37 %2, $vcc = V_ADD_I32_e64 %3.sub0, %1, 0, implicit $exec
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38 S_ENDPGM 0
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121
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39
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40 ...
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