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120
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1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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2 ; RUN: opt < %s -instcombine -S | FileCheck %s
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3
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4 ; Widen a select of constants to eliminate an extend.
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5
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6 define i16 @sel_sext_constants(i1 %cmp) {
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7 ; CHECK-LABEL: @sel_sext_constants(
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147
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8 ; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], i16 -1, i16 42
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120
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9 ; CHECK-NEXT: ret i16 [[EXT]]
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10 ;
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11 %sel = select i1 %cmp, i8 255, i8 42
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12 %ext = sext i8 %sel to i16
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13 ret i16 %ext
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14 }
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15
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16 define i16 @sel_zext_constants(i1 %cmp) {
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17 ; CHECK-LABEL: @sel_zext_constants(
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147
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18 ; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], i16 255, i16 42
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120
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19 ; CHECK-NEXT: ret i16 [[EXT]]
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20 ;
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21 %sel = select i1 %cmp, i8 255, i8 42
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22 %ext = zext i8 %sel to i16
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23 ret i16 %ext
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24 }
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25
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26 define double @sel_fpext_constants(i1 %cmp) {
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27 ; CHECK-LABEL: @sel_fpext_constants(
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147
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28 ; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], double -2.550000e+02, double 4.200000e+01
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120
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29 ; CHECK-NEXT: ret double [[EXT]]
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30 ;
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31 %sel = select i1 %cmp, float -255.0, float 42.0
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32 %ext = fpext float %sel to double
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33 ret double %ext
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34 }
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35
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36 ; FIXME: We should not grow the size of the select in the next 4 cases.
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37
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38 define i64 @sel_sext(i32 %a, i1 %cmp) {
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39 ; CHECK-LABEL: @sel_sext(
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147
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40 ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[A:%.*]] to i64
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41 ; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], i64 [[TMP1]], i64 42
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120
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42 ; CHECK-NEXT: ret i64 [[EXT]]
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43 ;
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44 %sel = select i1 %cmp, i32 %a, i32 42
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45 %ext = sext i32 %sel to i64
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46 ret i64 %ext
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47 }
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48
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49 define <4 x i64> @sel_sext_vec(<4 x i32> %a, <4 x i1> %cmp) {
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50 ; CHECK-LABEL: @sel_sext_vec(
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147
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51 ; CHECK-NEXT: [[TMP1:%.*]] = sext <4 x i32> [[A:%.*]] to <4 x i64>
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52 ; CHECK-NEXT: [[EXT:%.*]] = select <4 x i1> [[CMP:%.*]], <4 x i64> [[TMP1]], <4 x i64> <i64 42, i64 42, i64 42, i64 42>
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120
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53 ; CHECK-NEXT: ret <4 x i64> [[EXT]]
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54 ;
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55 %sel = select <4 x i1> %cmp, <4 x i32> %a, <4 x i32> <i32 42, i32 42, i32 42, i32 42>
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56 %ext = sext <4 x i32> %sel to <4 x i64>
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57 ret <4 x i64> %ext
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58 }
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59
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60 define i64 @sel_zext(i32 %a, i1 %cmp) {
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61 ; CHECK-LABEL: @sel_zext(
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147
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62 ; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[A:%.*]] to i64
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63 ; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], i64 [[TMP1]], i64 42
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120
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64 ; CHECK-NEXT: ret i64 [[EXT]]
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65 ;
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66 %sel = select i1 %cmp, i32 %a, i32 42
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67 %ext = zext i32 %sel to i64
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68 ret i64 %ext
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69 }
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70
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71 define <4 x i64> @sel_zext_vec(<4 x i32> %a, <4 x i1> %cmp) {
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72 ; CHECK-LABEL: @sel_zext_vec(
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147
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73 ; CHECK-NEXT: [[TMP1:%.*]] = zext <4 x i32> [[A:%.*]] to <4 x i64>
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74 ; CHECK-NEXT: [[EXT:%.*]] = select <4 x i1> [[CMP:%.*]], <4 x i64> [[TMP1]], <4 x i64> <i64 42, i64 42, i64 42, i64 42>
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120
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75 ; CHECK-NEXT: ret <4 x i64> [[EXT]]
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76 ;
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77 %sel = select <4 x i1> %cmp, <4 x i32> %a, <4 x i32> <i32 42, i32 42, i32 42, i32 42>
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78 %ext = zext <4 x i32> %sel to <4 x i64>
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79 ret <4 x i64> %ext
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80 }
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81
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82 ; FIXME: The next 18 tests cycle through trunc+select and {larger,smaller,equal} {sext,zext,fpext} {scalar,vector}.
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83 ; The only cases where we eliminate an instruction are equal zext with scalar/vector, so that's probably the only
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84 ; way to justify widening the select.
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85
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86 define i64 @trunc_sel_larger_sext(i32 %a, i1 %cmp) {
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87 ; CHECK-LABEL: @trunc_sel_larger_sext(
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147
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88 ; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[A:%.*]] to i16
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120
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89 ; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[TRUNC]] to i64
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147
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90 ; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], i64 [[TMP1]], i64 42
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120
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91 ; CHECK-NEXT: ret i64 [[EXT]]
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92 ;
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93 %trunc = trunc i32 %a to i16
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94 %sel = select i1 %cmp, i16 %trunc, i16 42
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95 %ext = sext i16 %sel to i64
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96 ret i64 %ext
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97 }
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98
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99 define <2 x i64> @trunc_sel_larger_sext_vec(<2 x i32> %a, <2 x i1> %cmp) {
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100 ; CHECK-LABEL: @trunc_sel_larger_sext_vec(
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147
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101 ; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i32> [[A:%.*]] to <2 x i16>
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102 ; CHECK-NEXT: [[TMP1:%.*]] = sext <2 x i16> [[TRUNC]] to <2 x i64>
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103 ; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> [[CMP:%.*]], <2 x i64> [[TMP1]], <2 x i64> <i64 42, i64 43>
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120
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104 ; CHECK-NEXT: ret <2 x i64> [[EXT]]
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105 ;
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106 %trunc = trunc <2 x i32> %a to <2 x i16>
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107 %sel = select <2 x i1> %cmp, <2 x i16> %trunc, <2 x i16> <i16 42, i16 43>
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108 %ext = sext <2 x i16> %sel to <2 x i64>
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109 ret <2 x i64> %ext
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110 }
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111
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112 define i32 @trunc_sel_smaller_sext(i64 %a, i1 %cmp) {
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113 ; CHECK-LABEL: @trunc_sel_smaller_sext(
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147
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114 ; CHECK-NEXT: [[TRUNC:%.*]] = trunc i64 [[A:%.*]] to i16
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120
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115 ; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[TRUNC]] to i32
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147
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116 ; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], i32 [[TMP1]], i32 42
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120
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117 ; CHECK-NEXT: ret i32 [[EXT]]
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118 ;
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119 %trunc = trunc i64 %a to i16
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120 %sel = select i1 %cmp, i16 %trunc, i16 42
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121 %ext = sext i16 %sel to i32
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122 ret i32 %ext
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123 }
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124
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125 define <2 x i32> @trunc_sel_smaller_sext_vec(<2 x i64> %a, <2 x i1> %cmp) {
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126 ; CHECK-LABEL: @trunc_sel_smaller_sext_vec(
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147
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127 ; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i64> [[A:%.*]] to <2 x i16>
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128 ; CHECK-NEXT: [[TMP1:%.*]] = sext <2 x i16> [[TRUNC]] to <2 x i32>
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129 ; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> [[CMP:%.*]], <2 x i32> [[TMP1]], <2 x i32> <i32 42, i32 43>
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120
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130 ; CHECK-NEXT: ret <2 x i32> [[EXT]]
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131 ;
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132 %trunc = trunc <2 x i64> %a to <2 x i16>
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133 %sel = select <2 x i1> %cmp, <2 x i16> %trunc, <2 x i16> <i16 42, i16 43>
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134 %ext = sext <2 x i16> %sel to <2 x i32>
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135 ret <2 x i32> %ext
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136 }
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137
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138 define i32 @trunc_sel_equal_sext(i32 %a, i1 %cmp) {
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139 ; CHECK-LABEL: @trunc_sel_equal_sext(
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147
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140 ; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[A:%.*]], 16
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141 ; CHECK-NEXT: [[TMP2:%.*]] = ashr exact i32 [[TMP1]], 16
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142 ; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], i32 [[TMP2]], i32 42
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120
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143 ; CHECK-NEXT: ret i32 [[EXT]]
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144 ;
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145 %trunc = trunc i32 %a to i16
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146 %sel = select i1 %cmp, i16 %trunc, i16 42
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147 %ext = sext i16 %sel to i32
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148 ret i32 %ext
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149 }
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150
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151 define <2 x i32> @trunc_sel_equal_sext_vec(<2 x i32> %a, <2 x i1> %cmp) {
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152 ; CHECK-LABEL: @trunc_sel_equal_sext_vec(
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147
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153 ; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i32> [[A:%.*]], <i32 16, i32 16>
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154 ; CHECK-NEXT: [[TMP2:%.*]] = ashr exact <2 x i32> [[TMP1]], <i32 16, i32 16>
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155 ; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> [[CMP:%.*]], <2 x i32> [[TMP2]], <2 x i32> <i32 42, i32 43>
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120
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156 ; CHECK-NEXT: ret <2 x i32> [[EXT]]
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157 ;
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158 %trunc = trunc <2 x i32> %a to <2 x i16>
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159 %sel = select <2 x i1> %cmp, <2 x i16> %trunc, <2 x i16> <i16 42, i16 43>
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160 %ext = sext <2 x i16> %sel to <2 x i32>
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161 ret <2 x i32> %ext
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162 }
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163
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164 define i64 @trunc_sel_larger_zext(i32 %a, i1 %cmp) {
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165 ; CHECK-LABEL: @trunc_sel_larger_zext(
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147
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166 ; CHECK-NEXT: [[TRUNC_MASK:%.*]] = and i32 [[A:%.*]], 65535
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120
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167 ; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[TRUNC_MASK]] to i64
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147
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168 ; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], i64 [[TMP1]], i64 42
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120
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169 ; CHECK-NEXT: ret i64 [[EXT]]
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170 ;
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171 %trunc = trunc i32 %a to i16
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172 %sel = select i1 %cmp, i16 %trunc, i16 42
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173 %ext = zext i16 %sel to i64
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174 ret i64 %ext
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175 }
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176
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|
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177 define <2 x i64> @trunc_sel_larger_zext_vec(<2 x i32> %a, <2 x i1> %cmp) {
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178 ; CHECK-LABEL: @trunc_sel_larger_zext_vec(
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147
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179 ; CHECK-NEXT: [[TRUNC_MASK:%.*]] = and <2 x i32> [[A:%.*]], <i32 65535, i32 65535>
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180 ; CHECK-NEXT: [[TMP1:%.*]] = zext <2 x i32> [[TRUNC_MASK]] to <2 x i64>
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181 ; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> [[CMP:%.*]], <2 x i64> [[TMP1]], <2 x i64> <i64 42, i64 43>
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120
|
182 ; CHECK-NEXT: ret <2 x i64> [[EXT]]
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183 ;
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184 %trunc = trunc <2 x i32> %a to <2 x i16>
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185 %sel = select <2 x i1> %cmp, <2 x i16> %trunc, <2 x i16> <i16 42, i16 43>
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186 %ext = zext <2 x i16> %sel to <2 x i64>
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187 ret <2 x i64> %ext
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188 }
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189
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|
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190 define i32 @trunc_sel_smaller_zext(i64 %a, i1 %cmp) {
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191 ; CHECK-LABEL: @trunc_sel_smaller_zext(
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147
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192 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[A:%.*]] to i32
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120
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193 ; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 65535
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147
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194 ; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], i32 [[TMP2]], i32 42
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120
|
195 ; CHECK-NEXT: ret i32 [[EXT]]
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196 ;
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197 %trunc = trunc i64 %a to i16
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198 %sel = select i1 %cmp, i16 %trunc, i16 42
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199 %ext = zext i16 %sel to i32
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200 ret i32 %ext
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201 }
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202
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|
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203 define <2 x i32> @trunc_sel_smaller_zext_vec(<2 x i64> %a, <2 x i1> %cmp) {
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|
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204 ; CHECK-LABEL: @trunc_sel_smaller_zext_vec(
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147
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205 ; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i64> [[A:%.*]] to <2 x i32>
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206 ; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i32> [[TMP1]], <i32 65535, i32 65535>
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207 ; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> [[CMP:%.*]], <2 x i32> [[TMP2]], <2 x i32> <i32 42, i32 43>
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120
|
208 ; CHECK-NEXT: ret <2 x i32> [[EXT]]
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209 ;
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210 %trunc = trunc <2 x i64> %a to <2 x i16>
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211 %sel = select <2 x i1> %cmp, <2 x i16> %trunc, <2 x i16> <i16 42, i16 43>
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212 %ext = zext <2 x i16> %sel to <2 x i32>
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213 ret <2 x i32> %ext
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214 }
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215
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|
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216 define i32 @trunc_sel_equal_zext(i32 %a, i1 %cmp) {
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217 ; CHECK-LABEL: @trunc_sel_equal_zext(
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147
|
218 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 65535
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|
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219 ; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], i32 [[TMP1]], i32 42
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120
|
220 ; CHECK-NEXT: ret i32 [[EXT]]
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221 ;
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222 %trunc = trunc i32 %a to i16
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223 %sel = select i1 %cmp, i16 %trunc, i16 42
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224 %ext = zext i16 %sel to i32
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225 ret i32 %ext
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226 }
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227
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|
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228 define <2 x i32> @trunc_sel_equal_zext_vec(<2 x i32> %a, <2 x i1> %cmp) {
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229 ; CHECK-LABEL: @trunc_sel_equal_zext_vec(
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147
|
230 ; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[A:%.*]], <i32 65535, i32 65535>
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|
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231 ; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> [[CMP:%.*]], <2 x i32> [[TMP1]], <2 x i32> <i32 42, i32 43>
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|
120
|
232 ; CHECK-NEXT: ret <2 x i32> [[EXT]]
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233 ;
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234 %trunc = trunc <2 x i32> %a to <2 x i16>
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235 %sel = select <2 x i1> %cmp, <2 x i16> %trunc, <2 x i16> <i16 42, i16 43>
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236 %ext = zext <2 x i16> %sel to <2 x i32>
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|
237 ret <2 x i32> %ext
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|
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238 }
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|
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239
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|
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240 define double @trunc_sel_larger_fpext(float %a, i1 %cmp) {
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|
|
241 ; CHECK-LABEL: @trunc_sel_larger_fpext(
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|
147
|
242 ; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc float [[A:%.*]] to half
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120
|
243 ; CHECK-NEXT: [[TMP1:%.*]] = fpext half [[TRUNC]] to double
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147
|
244 ; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], double [[TMP1]], double 4.200000e+01
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120
|
245 ; CHECK-NEXT: ret double [[EXT]]
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|
|
246 ;
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247 %trunc = fptrunc float %a to half
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248 %sel = select i1 %cmp, half %trunc, half 42.0
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|
249 %ext = fpext half %sel to double
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|
|
250 ret double %ext
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|
|
251 }
|
|
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252
|
|
|
253 define <2 x double> @trunc_sel_larger_fpext_vec(<2 x float> %a, <2 x i1> %cmp) {
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|
|
254 ; CHECK-LABEL: @trunc_sel_larger_fpext_vec(
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|
147
|
255 ; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc <2 x float> [[A:%.*]] to <2 x half>
|
|
120
|
256 ; CHECK-NEXT: [[TMP1:%.*]] = fpext <2 x half> [[TRUNC]] to <2 x double>
|
|
147
|
257 ; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> [[CMP:%.*]], <2 x double> [[TMP1]], <2 x double> <double 4.200000e+01, double 4.300000e+01>
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|
120
|
258 ; CHECK-NEXT: ret <2 x double> [[EXT]]
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|
|
259 ;
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|
|
260 %trunc = fptrunc <2 x float> %a to <2 x half>
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|
|
261 %sel = select <2 x i1> %cmp, <2 x half> %trunc, <2 x half> <half 42.0, half 43.0>
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|
|
262 %ext = fpext <2 x half> %sel to <2 x double>
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|
|
263 ret <2 x double> %ext
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|
|
264 }
|
|
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265
|
|
|
266 define float @trunc_sel_smaller_fpext(double %a, i1 %cmp) {
|
|
|
267 ; CHECK-LABEL: @trunc_sel_smaller_fpext(
|
|
147
|
268 ; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc double [[A:%.*]] to half
|
|
120
|
269 ; CHECK-NEXT: [[TMP1:%.*]] = fpext half [[TRUNC]] to float
|
|
147
|
270 ; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], float [[TMP1]], float 4.200000e+01
|
|
120
|
271 ; CHECK-NEXT: ret float [[EXT]]
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|
|
272 ;
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|
|
273 %trunc = fptrunc double %a to half
|
|
|
274 %sel = select i1 %cmp, half %trunc, half 42.0
|
|
|
275 %ext = fpext half %sel to float
|
|
|
276 ret float %ext
|
|
|
277 }
|
|
|
278
|
|
|
279 define <2 x float> @trunc_sel_smaller_fpext_vec(<2 x double> %a, <2 x i1> %cmp) {
|
|
|
280 ; CHECK-LABEL: @trunc_sel_smaller_fpext_vec(
|
|
147
|
281 ; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc <2 x double> [[A:%.*]] to <2 x half>
|
|
120
|
282 ; CHECK-NEXT: [[TMP1:%.*]] = fpext <2 x half> [[TRUNC]] to <2 x float>
|
|
147
|
283 ; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> [[CMP:%.*]], <2 x float> [[TMP1]], <2 x float> <float 4.200000e+01, float 4.300000e+01>
|
|
120
|
284 ; CHECK-NEXT: ret <2 x float> [[EXT]]
|
|
|
285 ;
|
|
|
286 %trunc = fptrunc <2 x double> %a to <2 x half>
|
|
|
287 %sel = select <2 x i1> %cmp, <2 x half> %trunc, <2 x half> <half 42.0, half 43.0>
|
|
|
288 %ext = fpext <2 x half> %sel to <2 x float>
|
|
|
289 ret <2 x float> %ext
|
|
|
290 }
|
|
|
291
|
|
|
292 define float @trunc_sel_equal_fpext(float %a, i1 %cmp) {
|
|
|
293 ; CHECK-LABEL: @trunc_sel_equal_fpext(
|
|
147
|
294 ; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc float [[A:%.*]] to half
|
|
120
|
295 ; CHECK-NEXT: [[TMP1:%.*]] = fpext half [[TRUNC]] to float
|
|
147
|
296 ; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], float [[TMP1]], float 4.200000e+01
|
|
120
|
297 ; CHECK-NEXT: ret float [[EXT]]
|
|
|
298 ;
|
|
|
299 %trunc = fptrunc float %a to half
|
|
|
300 %sel = select i1 %cmp, half %trunc, half 42.0
|
|
|
301 %ext = fpext half %sel to float
|
|
|
302 ret float %ext
|
|
|
303 }
|
|
|
304
|
|
|
305 define <2 x float> @trunc_sel_equal_fpext_vec(<2 x float> %a, <2 x i1> %cmp) {
|
|
|
306 ; CHECK-LABEL: @trunc_sel_equal_fpext_vec(
|
|
147
|
307 ; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc <2 x float> [[A:%.*]] to <2 x half>
|
|
120
|
308 ; CHECK-NEXT: [[TMP1:%.*]] = fpext <2 x half> [[TRUNC]] to <2 x float>
|
|
147
|
309 ; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> [[CMP:%.*]], <2 x float> [[TMP1]], <2 x float> <float 4.200000e+01, float 4.300000e+01>
|
|
120
|
310 ; CHECK-NEXT: ret <2 x float> [[EXT]]
|
|
|
311 ;
|
|
|
312 %trunc = fptrunc <2 x float> %a to <2 x half>
|
|
|
313 %sel = select <2 x i1> %cmp, <2 x half> %trunc, <2 x half> <half 42.0, half 43.0>
|
|
|
314 %ext = fpext <2 x half> %sel to <2 x float>
|
|
|
315 ret <2 x float> %ext
|
|
|
316 }
|
|
|
317
|
|
|
318 define i32 @test_sext1(i1 %cca, i1 %ccb) {
|
|
|
319 ; CHECK-LABEL: @test_sext1(
|
|
147
|
320 ; CHECK-NEXT: [[NARROW:%.*]] = and i1 [[CCB:%.*]], [[CCA:%.*]]
|
|
|
321 ; CHECK-NEXT: [[R:%.*]] = sext i1 [[NARROW]] to i32
|
|
120
|
322 ; CHECK-NEXT: ret i32 [[R]]
|
|
|
323 ;
|
|
|
324 %ccax = sext i1 %cca to i32
|
|
|
325 %r = select i1 %ccb, i32 %ccax, i32 0
|
|
|
326 ret i32 %r
|
|
|
327 }
|
|
|
328
|
|
|
329 define i32 @test_sext2(i1 %cca, i1 %ccb) {
|
|
|
330 ; CHECK-LABEL: @test_sext2(
|
|
147
|
331 ; CHECK-NEXT: [[NARROW:%.*]] = or i1 [[CCB:%.*]], [[CCA:%.*]]
|
|
|
332 ; CHECK-NEXT: [[R:%.*]] = sext i1 [[NARROW]] to i32
|
|
120
|
333 ; CHECK-NEXT: ret i32 [[R]]
|
|
|
334 ;
|
|
|
335 %ccax = sext i1 %cca to i32
|
|
|
336 %r = select i1 %ccb, i32 -1, i32 %ccax
|
|
|
337 ret i32 %r
|
|
|
338 }
|
|
|
339
|
|
|
340 define i32 @test_sext3(i1 %cca, i1 %ccb) {
|
|
|
341 ; CHECK-LABEL: @test_sext3(
|
|
147
|
342 ; CHECK-NEXT: [[NOT_CCB:%.*]] = xor i1 [[CCB:%.*]], true
|
|
|
343 ; CHECK-NEXT: [[NARROW:%.*]] = and i1 [[NOT_CCB]], [[CCA:%.*]]
|
|
|
344 ; CHECK-NEXT: [[R:%.*]] = sext i1 [[NARROW]] to i32
|
|
120
|
345 ; CHECK-NEXT: ret i32 [[R]]
|
|
|
346 ;
|
|
|
347 %ccax = sext i1 %cca to i32
|
|
|
348 %r = select i1 %ccb, i32 0, i32 %ccax
|
|
|
349 ret i32 %r
|
|
|
350 }
|
|
|
351
|
|
|
352 define i32 @test_sext4(i1 %cca, i1 %ccb) {
|
|
|
353 ; CHECK-LABEL: @test_sext4(
|
|
147
|
354 ; CHECK-NEXT: [[NOT_CCB:%.*]] = xor i1 [[CCB:%.*]], true
|
|
|
355 ; CHECK-NEXT: [[NARROW:%.*]] = or i1 [[NOT_CCB]], [[CCA:%.*]]
|
|
|
356 ; CHECK-NEXT: [[R:%.*]] = sext i1 [[NARROW]] to i32
|
|
120
|
357 ; CHECK-NEXT: ret i32 [[R]]
|
|
|
358 ;
|
|
|
359 %ccax = sext i1 %cca to i32
|
|
|
360 %r = select i1 %ccb, i32 %ccax, i32 -1
|
|
|
361 ret i32 %r
|
|
|
362 }
|
|
|
363
|
|
|
364 define i32 @test_zext1(i1 %cca, i1 %ccb) {
|
|
|
365 ; CHECK-LABEL: @test_zext1(
|
|
147
|
366 ; CHECK-NEXT: [[NARROW:%.*]] = and i1 [[CCB:%.*]], [[CCA:%.*]]
|
|
|
367 ; CHECK-NEXT: [[R:%.*]] = zext i1 [[NARROW]] to i32
|
|
120
|
368 ; CHECK-NEXT: ret i32 [[R]]
|
|
|
369 ;
|
|
|
370 %ccax = zext i1 %cca to i32
|
|
|
371 %r = select i1 %ccb, i32 %ccax, i32 0
|
|
|
372 ret i32 %r
|
|
|
373 }
|
|
|
374
|
|
|
375 define i32 @test_zext2(i1 %cca, i1 %ccb) {
|
|
|
376 ; CHECK-LABEL: @test_zext2(
|
|
147
|
377 ; CHECK-NEXT: [[NARROW:%.*]] = or i1 [[CCB:%.*]], [[CCA:%.*]]
|
|
|
378 ; CHECK-NEXT: [[R:%.*]] = zext i1 [[NARROW]] to i32
|
|
120
|
379 ; CHECK-NEXT: ret i32 [[R]]
|
|
|
380 ;
|
|
|
381 %ccax = zext i1 %cca to i32
|
|
|
382 %r = select i1 %ccb, i32 1, i32 %ccax
|
|
|
383 ret i32 %r
|
|
|
384 }
|
|
|
385
|
|
|
386 define i32 @test_zext3(i1 %cca, i1 %ccb) {
|
|
|
387 ; CHECK-LABEL: @test_zext3(
|
|
147
|
388 ; CHECK-NEXT: [[NOT_CCB:%.*]] = xor i1 [[CCB:%.*]], true
|
|
|
389 ; CHECK-NEXT: [[NARROW:%.*]] = and i1 [[NOT_CCB]], [[CCA:%.*]]
|
|
|
390 ; CHECK-NEXT: [[R:%.*]] = zext i1 [[NARROW]] to i32
|
|
120
|
391 ; CHECK-NEXT: ret i32 [[R]]
|
|
|
392 ;
|
|
|
393 %ccax = zext i1 %cca to i32
|
|
|
394 %r = select i1 %ccb, i32 0, i32 %ccax
|
|
|
395 ret i32 %r
|
|
|
396 }
|
|
|
397
|
|
|
398 define i32 @test_zext4(i1 %cca, i1 %ccb) {
|
|
|
399 ; CHECK-LABEL: @test_zext4(
|
|
147
|
400 ; CHECK-NEXT: [[NOT_CCB:%.*]] = xor i1 [[CCB:%.*]], true
|
|
|
401 ; CHECK-NEXT: [[NARROW:%.*]] = or i1 [[NOT_CCB]], [[CCA:%.*]]
|
|
|
402 ; CHECK-NEXT: [[R:%.*]] = zext i1 [[NARROW]] to i32
|
|
120
|
403 ; CHECK-NEXT: ret i32 [[R]]
|
|
|
404 ;
|
|
|
405 %ccax = zext i1 %cca to i32
|
|
|
406 %r = select i1 %ccb, i32 %ccax, i32 1
|
|
|
407 ret i32 %r
|
|
|
408 }
|
|
|
409
|
|
|
410 define i32 @test_negative_sext(i1 %a, i1 %cc) {
|
|
|
411 ; CHECK-LABEL: @test_negative_sext(
|
|
147
|
412 ; CHECK-NEXT: [[A_EXT:%.*]] = sext i1 [[A:%.*]] to i32
|
|
|
413 ; CHECK-NEXT: [[R:%.*]] = select i1 [[CC:%.*]], i32 [[A_EXT]], i32 1
|
|
120
|
414 ; CHECK-NEXT: ret i32 [[R]]
|
|
|
415 ;
|
|
|
416 %a.ext = sext i1 %a to i32
|
|
|
417 %r = select i1 %cc, i32 %a.ext, i32 1
|
|
|
418 ret i32 %r
|
|
|
419 }
|
|
|
420
|
|
|
421 define i32 @test_negative_zext(i1 %a, i1 %cc) {
|
|
|
422 ; CHECK-LABEL: @test_negative_zext(
|
|
147
|
423 ; CHECK-NEXT: [[A_EXT:%.*]] = zext i1 [[A:%.*]] to i32
|
|
|
424 ; CHECK-NEXT: [[R:%.*]] = select i1 [[CC:%.*]], i32 [[A_EXT]], i32 -1
|
|
120
|
425 ; CHECK-NEXT: ret i32 [[R]]
|
|
|
426 ;
|
|
|
427 %a.ext = zext i1 %a to i32
|
|
|
428 %r = select i1 %cc, i32 %a.ext, i32 -1
|
|
|
429 ret i32 %r
|
|
|
430 }
|
|
|
431
|
|
|
432 define i32 @test_bits_sext(i8 %a, i1 %cc) {
|
|
|
433 ; CHECK-LABEL: @test_bits_sext(
|
|
147
|
434 ; CHECK-NEXT: [[A_EXT:%.*]] = sext i8 [[A:%.*]] to i32
|
|
|
435 ; CHECK-NEXT: [[R:%.*]] = select i1 [[CC:%.*]], i32 [[A_EXT]], i32 -128
|
|
120
|
436 ; CHECK-NEXT: ret i32 [[R]]
|
|
|
437 ;
|
|
|
438 %a.ext = sext i8 %a to i32
|
|
|
439 %r = select i1 %cc, i32 %a.ext, i32 -128
|
|
|
440 ret i32 %r
|
|
|
441 }
|
|
|
442
|
|
|
443 define i32 @test_bits_zext(i8 %a, i1 %cc) {
|
|
|
444 ; CHECK-LABEL: @test_bits_zext(
|
|
147
|
445 ; CHECK-NEXT: [[A_EXT:%.*]] = zext i8 [[A:%.*]] to i32
|
|
|
446 ; CHECK-NEXT: [[R:%.*]] = select i1 [[CC:%.*]], i32 [[A_EXT]], i32 255
|
|
120
|
447 ; CHECK-NEXT: ret i32 [[R]]
|
|
|
448 ;
|
|
|
449 %a.ext = zext i8 %a to i32
|
|
|
450 %r = select i1 %cc, i32 %a.ext, i32 255
|
|
|
451 ret i32 %r
|
|
|
452 }
|
|
|
453
|
|
|
454 define i32 @test_op_op(i32 %a, i32 %b, i32 %c) {
|
|
|
455 ; CHECK-LABEL: @test_op_op(
|
|
147
|
456 ; CHECK-NEXT: [[CCA:%.*]] = icmp sgt i32 [[A:%.*]], 0
|
|
|
457 ; CHECK-NEXT: [[CCB:%.*]] = icmp sgt i32 [[B:%.*]], 0
|
|
|
458 ; CHECK-NEXT: [[CCC:%.*]] = icmp sgt i32 [[C:%.*]], 0
|
|
120
|
459 ; CHECK-NEXT: [[R_V:%.*]] = select i1 [[CCC]], i1 [[CCA]], i1 [[CCB]]
|
|
147
|
460 ; CHECK-NEXT: [[R:%.*]] = sext i1 [[R_V]] to i32
|
|
120
|
461 ; CHECK-NEXT: ret i32 [[R]]
|
|
|
462 ;
|
|
|
463 %cca = icmp sgt i32 %a, 0
|
|
|
464 %ccax = sext i1 %cca to i32
|
|
|
465 %ccb = icmp sgt i32 %b, 0
|
|
|
466 %ccbx = sext i1 %ccb to i32
|
|
|
467 %ccc = icmp sgt i32 %c, 0
|
|
|
468 %r = select i1 %ccc, i32 %ccax, i32 %ccbx
|
|
|
469 ret i32 %r
|
|
|
470 }
|
|
|
471
|
|
|
472 define <2 x i32> @test_vectors_sext(<2 x i1> %cca, <2 x i1> %ccb) {
|
|
|
473 ; CHECK-LABEL: @test_vectors_sext(
|
|
147
|
474 ; CHECK-NEXT: [[NARROW:%.*]] = and <2 x i1> [[CCB:%.*]], [[CCA:%.*]]
|
|
|
475 ; CHECK-NEXT: [[R:%.*]] = sext <2 x i1> [[NARROW]] to <2 x i32>
|
|
120
|
476 ; CHECK-NEXT: ret <2 x i32> [[R]]
|
|
|
477 ;
|
|
|
478 %ccax = sext <2 x i1> %cca to <2 x i32>
|
|
|
479 %r = select <2 x i1> %ccb, <2 x i32> %ccax, <2 x i32> <i32 0, i32 0>
|
|
|
480 ret <2 x i32> %r
|
|
|
481 }
|
|
|
482
|
|
|
483 define <2 x i32> @test_vectors_sext_nonsplat(<2 x i1> %cca, <2 x i1> %ccb) {
|
|
|
484 ; CHECK-LABEL: @test_vectors_sext_nonsplat(
|
|
147
|
485 ; CHECK-NEXT: [[NARROW:%.*]] = select <2 x i1> [[CCB:%.*]], <2 x i1> [[CCA:%.*]], <2 x i1> <i1 false, i1 true>
|
|
120
|
486 ; CHECK-NEXT: [[R:%.*]] = sext <2 x i1> [[NARROW]] to <2 x i32>
|
|
|
487 ; CHECK-NEXT: ret <2 x i32> [[R]]
|
|
|
488 ;
|
|
|
489 %ccax = sext <2 x i1> %cca to <2 x i32>
|
|
|
490 %r = select <2 x i1> %ccb, <2 x i32> %ccax, <2 x i32> <i32 0, i32 -1>
|
|
|
491 ret <2 x i32> %r
|
|
|
492 }
|
|
|
493
|
|
|
494 define <2 x i32> @test_vectors_zext(<2 x i1> %cca, <2 x i1> %ccb) {
|
|
|
495 ; CHECK-LABEL: @test_vectors_zext(
|
|
147
|
496 ; CHECK-NEXT: [[NARROW:%.*]] = and <2 x i1> [[CCB:%.*]], [[CCA:%.*]]
|
|
|
497 ; CHECK-NEXT: [[R:%.*]] = zext <2 x i1> [[NARROW]] to <2 x i32>
|
|
120
|
498 ; CHECK-NEXT: ret <2 x i32> [[R]]
|
|
|
499 ;
|
|
|
500 %ccax = zext <2 x i1> %cca to <2 x i32>
|
|
|
501 %r = select <2 x i1> %ccb, <2 x i32> %ccax, <2 x i32> <i32 0, i32 0>
|
|
|
502 ret <2 x i32> %r
|
|
|
503 }
|
|
|
504
|
|
|
505 define <2 x i32> @test_vectors_zext_nonsplat(<2 x i1> %cca, <2 x i1> %ccb) {
|
|
|
506 ; CHECK-LABEL: @test_vectors_zext_nonsplat(
|
|
147
|
507 ; CHECK-NEXT: [[NARROW:%.*]] = select <2 x i1> [[CCB:%.*]], <2 x i1> [[CCA:%.*]], <2 x i1> <i1 true, i1 false>
|
|
120
|
508 ; CHECK-NEXT: [[R:%.*]] = zext <2 x i1> [[NARROW]] to <2 x i32>
|
|
|
509 ; CHECK-NEXT: ret <2 x i32> [[R]]
|
|
|
510 ;
|
|
|
511 %ccax = zext <2 x i1> %cca to <2 x i32>
|
|
|
512 %r = select <2 x i1> %ccb, <2 x i32> %ccax, <2 x i32> <i32 1, i32 0>
|
|
|
513 ret <2 x i32> %r
|
|
|
514 }
|
|
|
515
|
|
|
516 define <2 x i32> @scalar_select_of_vectors_sext(<2 x i1> %cca, i1 %ccb) {
|
|
|
517 ; CHECK-LABEL: @scalar_select_of_vectors_sext(
|
|
147
|
518 ; CHECK-NEXT: [[NARROW:%.*]] = select i1 [[CCB:%.*]], <2 x i1> [[CCA:%.*]], <2 x i1> zeroinitializer
|
|
|
519 ; CHECK-NEXT: [[R:%.*]] = sext <2 x i1> [[NARROW]] to <2 x i32>
|
|
120
|
520 ; CHECK-NEXT: ret <2 x i32> [[R]]
|
|
|
521 ;
|
|
|
522 %ccax = sext <2 x i1> %cca to <2 x i32>
|
|
|
523 %r = select i1 %ccb, <2 x i32> %ccax, <2 x i32> <i32 0, i32 0>
|
|
|
524 ret <2 x i32> %r
|
|
|
525 }
|
|
|
526
|
|
|
527 define <2 x i32> @scalar_select_of_vectors_zext(<2 x i1> %cca, i1 %ccb) {
|
|
|
528 ; CHECK-LABEL: @scalar_select_of_vectors_zext(
|
|
147
|
529 ; CHECK-NEXT: [[NARROW:%.*]] = select i1 [[CCB:%.*]], <2 x i1> [[CCA:%.*]], <2 x i1> zeroinitializer
|
|
|
530 ; CHECK-NEXT: [[R:%.*]] = zext <2 x i1> [[NARROW]] to <2 x i32>
|
|
120
|
531 ; CHECK-NEXT: ret <2 x i32> [[R]]
|
|
|
532 ;
|
|
|
533 %ccax = zext <2 x i1> %cca to <2 x i32>
|
|
|
534 %r = select i1 %ccb, <2 x i32> %ccax, <2 x i32> <i32 0, i32 0>
|
|
|
535 ret <2 x i32> %r
|
|
|
536 }
|
|
|
537
|
|
|
538 define i32 @sext_true_val_must_be_all_ones(i1 %x) {
|
|
|
539 ; CHECK-LABEL: @sext_true_val_must_be_all_ones(
|
|
147
|
540 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], i32 -1, i32 42, !prof !0
|
|
120
|
541 ; CHECK-NEXT: ret i32 [[SEL]]
|
|
|
542 ;
|
|
|
543 %ext = sext i1 %x to i32
|
|
|
544 %sel = select i1 %x, i32 %ext, i32 42, !prof !0
|
|
|
545 ret i32 %sel
|
|
|
546 }
|
|
|
547
|
|
|
548 define <2 x i32> @sext_true_val_must_be_all_ones_vec(<2 x i1> %x) {
|
|
|
549 ; CHECK-LABEL: @sext_true_val_must_be_all_ones_vec(
|
|
147
|
550 ; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[X:%.*]], <2 x i32> <i32 -1, i32 -1>, <2 x i32> <i32 42, i32 12>, !prof !0
|
|
120
|
551 ; CHECK-NEXT: ret <2 x i32> [[SEL]]
|
|
|
552 ;
|
|
|
553 %ext = sext <2 x i1> %x to <2 x i32>
|
|
|
554 %sel = select <2 x i1> %x, <2 x i32> %ext, <2 x i32> <i32 42, i32 12>, !prof !0
|
|
|
555 ret <2 x i32> %sel
|
|
|
556 }
|
|
|
557
|
|
|
558 define i32 @zext_true_val_must_be_one(i1 %x) {
|
|
|
559 ; CHECK-LABEL: @zext_true_val_must_be_one(
|
|
147
|
560 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], i32 1, i32 42, !prof !0
|
|
120
|
561 ; CHECK-NEXT: ret i32 [[SEL]]
|
|
|
562 ;
|
|
|
563 %ext = zext i1 %x to i32
|
|
|
564 %sel = select i1 %x, i32 %ext, i32 42, !prof !0
|
|
|
565 ret i32 %sel
|
|
|
566 }
|
|
|
567
|
|
|
568 define <2 x i32> @zext_true_val_must_be_one_vec(<2 x i1> %x) {
|
|
|
569 ; CHECK-LABEL: @zext_true_val_must_be_one_vec(
|
|
147
|
570 ; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[X:%.*]], <2 x i32> <i32 1, i32 1>, <2 x i32> <i32 42, i32 12>, !prof !0
|
|
120
|
571 ; CHECK-NEXT: ret <2 x i32> [[SEL]]
|
|
|
572 ;
|
|
|
573 %ext = zext <2 x i1> %x to <2 x i32>
|
|
|
574 %sel = select <2 x i1> %x, <2 x i32> %ext, <2 x i32> <i32 42, i32 12>, !prof !0
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575 ret <2 x i32> %sel
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576 }
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577
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578 define i32 @sext_false_val_must_be_zero(i1 %x) {
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|
|
579 ; CHECK-LABEL: @sext_false_val_must_be_zero(
|
|
147
|
580 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], i32 42, i32 0, !prof !0
|
|
120
|
581 ; CHECK-NEXT: ret i32 [[SEL]]
|
|
|
582 ;
|
|
|
583 %ext = sext i1 %x to i32
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|
|
584 %sel = select i1 %x, i32 42, i32 %ext, !prof !0
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|
585 ret i32 %sel
|
|
|
586 }
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|
|
587
|
|
|
588 define <2 x i32> @sext_false_val_must_be_zero_vec(<2 x i1> %x) {
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|
|
589 ; CHECK-LABEL: @sext_false_val_must_be_zero_vec(
|
|
147
|
590 ; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[X:%.*]], <2 x i32> <i32 42, i32 12>, <2 x i32> zeroinitializer, !prof !0
|
|
120
|
591 ; CHECK-NEXT: ret <2 x i32> [[SEL]]
|
|
|
592 ;
|
|
|
593 %ext = sext <2 x i1> %x to <2 x i32>
|
|
|
594 %sel = select <2 x i1> %x, <2 x i32> <i32 42, i32 12>, <2 x i32> %ext, !prof !0
|
|
|
595 ret <2 x i32> %sel
|
|
|
596 }
|
|
|
597
|
|
|
598 define i32 @zext_false_val_must_be_zero(i1 %x) {
|
|
|
599 ; CHECK-LABEL: @zext_false_val_must_be_zero(
|
|
147
|
600 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], i32 42, i32 0, !prof !0
|
|
120
|
601 ; CHECK-NEXT: ret i32 [[SEL]]
|
|
|
602 ;
|
|
|
603 %ext = zext i1 %x to i32
|
|
|
604 %sel = select i1 %x, i32 42, i32 %ext, !prof !0
|
|
|
605 ret i32 %sel
|
|
|
606 }
|
|
|
607
|
|
|
608 define <2 x i32> @zext_false_val_must_be_zero_vec(<2 x i1> %x) {
|
|
|
609 ; CHECK-LABEL: @zext_false_val_must_be_zero_vec(
|
|
147
|
610 ; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[X:%.*]], <2 x i32> <i32 42, i32 12>, <2 x i32> zeroinitializer, !prof !0
|
|
120
|
611 ; CHECK-NEXT: ret <2 x i32> [[SEL]]
|
|
|
612 ;
|
|
|
613 %ext = zext <2 x i1> %x to <2 x i32>
|
|
|
614 %sel = select <2 x i1> %x, <2 x i32> <i32 42, i32 12>, <2 x i32> %ext, !prof !0
|
|
|
615 ret <2 x i32> %sel
|
|
|
616 }
|
|
|
617
|
|
|
618 !0 = !{!"branch_weights", i32 3, i32 5}
|
|
|
619
|
