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1 // WebAssemblyMachineFunctionInfo.h-WebAssembly machine function info-*- C++ -*-
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 ///
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10 /// \file
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11 /// \brief This file declares WebAssembly-specific per-machine-function
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12 /// information.
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13 ///
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14 //===----------------------------------------------------------------------===//
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15
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16 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
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17 #define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
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18
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100
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19 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
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20 #include "llvm/CodeGen/MachineRegisterInfo.h"
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21
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22 namespace llvm {
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23
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24 /// This class is derived from MachineFunctionInfo and contains private
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25 /// WebAssembly-specific information for each MachineFunction.
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26 class WebAssemblyFunctionInfo final : public MachineFunctionInfo {
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27 MachineFunction &MF;
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28
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100
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29 std::vector<MVT> Params;
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120
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30 std::vector<MVT> Results;
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31 std::vector<MVT> Locals;
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100
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32
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33 /// A mapping from CodeGen vreg index to WebAssembly register number.
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34 std::vector<unsigned> WARegs;
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35
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36 /// A mapping from CodeGen vreg index to a boolean value indicating whether
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37 /// the given register is considered to be "stackified", meaning it has been
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38 /// determined or made to meet the stack requirements:
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39 /// - single use (per path)
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40 /// - single def (per path)
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41 /// - defined and used in LIFO order with other stack registers
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42 BitVector VRegStackified;
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43
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120
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44 // A virtual register holding the pointer to the vararg buffer for vararg
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45 // functions. It is created and set in TLI::LowerFormalArguments and read by
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46 // TLI::LowerVASTART
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47 unsigned VarargVreg = -1U;
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48
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49 // A virtual register holding the base pointer for functions that have
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50 // overaligned values on the user stack.
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51 unsigned BasePtrVreg = -1U;
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52
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53 public:
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54 explicit WebAssemblyFunctionInfo(MachineFunction &MF) : MF(MF) {}
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55 ~WebAssemblyFunctionInfo() override;
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56
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57 void addParam(MVT VT) { Params.push_back(VT); }
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58 const std::vector<MVT> &getParams() const { return Params; }
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59
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60 void addResult(MVT VT) { Results.push_back(VT); }
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61 const std::vector<MVT> &getResults() const { return Results; }
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62
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63 void addLocal(MVT VT) { Locals.push_back(VT); }
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64 const std::vector<MVT> &getLocals() const { return Locals; }
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65
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66 unsigned getVarargBufferVreg() const {
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67 assert(VarargVreg != -1U && "Vararg vreg hasn't been set");
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68 return VarargVreg;
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69 }
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70 void setVarargBufferVreg(unsigned Reg) { VarargVreg = Reg; }
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71
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72 unsigned getBasePointerVreg() const {
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73 assert(BasePtrVreg != -1U && "Base ptr vreg hasn't been set");
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74 return BasePtrVreg;
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75 }
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76 void setBasePointerVreg(unsigned Reg) { BasePtrVreg = Reg; }
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77
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78 static const unsigned UnusedReg = -1u;
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79
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80 void stackifyVReg(unsigned VReg) {
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120
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81 assert(MF.getRegInfo().getUniqueVRegDef(VReg));
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82 if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size())
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83 VRegStackified.resize(TargetRegisterInfo::virtReg2Index(VReg) + 1);
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84 VRegStackified.set(TargetRegisterInfo::virtReg2Index(VReg));
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85 }
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86 bool isVRegStackified(unsigned VReg) const {
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87 if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size())
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88 return false;
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89 return VRegStackified.test(TargetRegisterInfo::virtReg2Index(VReg));
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90 }
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91
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92 void initWARegs();
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93 void setWAReg(unsigned VReg, unsigned WAReg) {
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94 assert(WAReg != UnusedReg);
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95 assert(TargetRegisterInfo::virtReg2Index(VReg) < WARegs.size());
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96 WARegs[TargetRegisterInfo::virtReg2Index(VReg)] = WAReg;
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97 }
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98 unsigned getWAReg(unsigned Reg) const {
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120
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99 assert(TargetRegisterInfo::virtReg2Index(Reg) < WARegs.size());
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100 return WARegs[TargetRegisterInfo::virtReg2Index(Reg)];
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100
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101 }
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102
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120
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103 // For a given stackified WAReg, return the id number to print with push/pop.
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104 static unsigned getWARegStackId(unsigned Reg) {
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105 assert(Reg & INT32_MIN);
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106 return Reg & INT32_MAX;
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100
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107 }
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108 };
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109
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120
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110 void ComputeLegalValueVTs(const Function &F, const TargetMachine &TM,
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111 Type *Ty, SmallVectorImpl<MVT> &ValueVTs);
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112
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113 void ComputeSignatureVTs(const Function &F, const TargetMachine &TM,
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114 SmallVectorImpl<MVT> &Params,
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115 SmallVectorImpl<MVT> &Results);
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116
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117 } // end namespace llvm
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118
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119 #endif
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