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1 //===-- AMDGPUSubtarget.cpp - AMDGPU Subtarget Information ----------------===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 /// \file
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11 /// \brief Implements the AMDGPU specific subclass of TargetSubtarget.
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12 //
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13 //===----------------------------------------------------------------------===//
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14
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15 #include "AMDGPUSubtarget.h"
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77
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16 #include "R600ISelLowering.h"
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17 #include "R600InstrInfo.h"
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18 #include "R600MachineScheduler.h"
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19 #include "SIInstrInfo.h"
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20 #include "SIISelLowering.h"
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21 #include "llvm/ADT/SmallString.h"
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22
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23 #include "llvm/ADT/SmallString.h"
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24
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25 using namespace llvm;
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26
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27 #define DEBUG_TYPE "amdgpu-subtarget"
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28
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29 #define GET_SUBTARGETINFO_ENUM
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30 #define GET_SUBTARGETINFO_TARGET_DESC
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31 #define GET_SUBTARGETINFO_CTOR
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32 #include "AMDGPUGenSubtargetInfo.inc"
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33
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34 static std::string computeDataLayout(const AMDGPUSubtarget &ST) {
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35 std::string Ret = "e-p:32:32";
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36
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37 if (ST.is64bit()) {
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38 // 32-bit private, local, and region pointers. 64-bit global and constant.
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39 Ret += "-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:64:64";
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40 }
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41
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42 Ret += "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256"
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43 "-v512:512-v1024:1024-v2048:2048-n32:64";
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44
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45 return Ret;
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46 }
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47
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48 AMDGPUSubtarget &
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49 AMDGPUSubtarget::initializeSubtargetDependencies(StringRef GPU, StringRef FS) {
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50 // Determine default and user-specified characteristics
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51 // On SI+, we want FP64 denormals to be on by default. FP32 denormals can be
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52 // enabled, but some instructions do not respect them and they run at the
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53 // double precision rate, so don't enable by default.
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54 //
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55 // We want to be able to turn these off, but making this a subtarget feature
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56 // for SI has the unhelpful behavior that it unsets everything else if you
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57 // disable it.
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58
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59 SmallString<256> FullFS("+promote-alloca,+fp64-denormals,");
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60 FullFS += FS;
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61
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62 ParseSubtargetFeatures(GPU, FullFS);
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63
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64 // FIXME: I don't think think Evergreen has any useful support for
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65 // denormals, but should be checked. Should we issue a warning somewhere
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66 // if someone tries to enable these?
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67 if (getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) {
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68 FP32Denormals = false;
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69 FP64Denormals = false;
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70 }
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71 return *this;
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72 }
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73
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74 AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef GPU, StringRef FS,
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75 TargetMachine &TM)
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76 : AMDGPUGenSubtargetInfo(TT, GPU, FS), DevName(GPU), Is64bit(false),
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77 DumpCode(false), R600ALUInst(false), HasVertexCache(false),
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78 TexVTXClauseSize(0), Gen(AMDGPUSubtarget::R600), FP64(false),
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79 FP64Denormals(false), FP32Denormals(false), CaymanISA(false),
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80 EnableIRStructurizer(true), EnablePromoteAlloca(false), EnableIfCvt(true),
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81 WavefrontSize(0), CFALUBug(false), LocalMemorySize(0),
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82 DL(computeDataLayout(initializeSubtargetDependencies(GPU, FS))),
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83 FrameLowering(TargetFrameLowering::StackGrowsUp,
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84 64 * 16, // Maximum stack alignment (long16)
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85 0),
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86 InstrItins(getInstrItineraryForCPU(GPU)) {
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87
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88 if (getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) {
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89 InstrInfo.reset(new R600InstrInfo(*this));
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90 TLInfo.reset(new R600TargetLowering(TM));
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91 } else {
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92 InstrInfo.reset(new SIInstrInfo(*this));
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93 TLInfo.reset(new SITargetLowering(TM));
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94 }
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95 }
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96
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97 unsigned AMDGPUSubtarget::getStackEntrySize() const {
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98 assert(getGeneration() <= NORTHERN_ISLANDS);
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99 switch(getWavefrontSize()) {
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100 case 16:
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101 return 8;
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102 case 32:
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103 return hasCaymanISA() ? 4 : 8;
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104 case 64:
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105 return 4;
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106 default:
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107 llvm_unreachable("Illegal wavefront size.");
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108 }
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109 }
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