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annotate test/CodeGen/AArch64/tail-call.ll @ 77:54457678186b

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LLVM 3.6
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Mon, 08 Sep 2014 22:06:00 +0900
parents 95c75e76d11b
children afa8332a0e37
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1 ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -tailcallopt | FileCheck %s
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2
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3 declare fastcc void @callee_stack0()
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4 declare fastcc void @callee_stack8([8 x i32], i64)
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5 declare fastcc void @callee_stack16([8 x i32], i64, i64)
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6 declare extern_weak fastcc void @callee_weak()
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8 define fastcc void @caller_to0_from0() nounwind {
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9 ; CHECK-LABEL: caller_to0_from0:
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10 ; CHECK-NEXT: // BB
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12 tail call fastcc void @callee_stack0()
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13 ret void
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0
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15 ; CHECK-NEXT: b callee_stack0
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16 }
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18 define fastcc void @caller_to0_from8([8 x i32], i64) {
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19 ; CHECK-LABEL: caller_to0_from8:
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21 tail call fastcc void @callee_stack0()
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22 ret void
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0
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24 ; CHECK: add sp, sp, #16
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25 ; CHECK-NEXT: b callee_stack0
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26 }
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28 define fastcc void @caller_to8_from0() {
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29 ; CHECK-LABEL: caller_to8_from0:
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30 ; CHECK: sub sp, sp, #32
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31
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32 ; Key point is that the "42" should go #16 below incoming stack
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33 ; pointer (we didn't have arg space to reuse).
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34 tail call fastcc void @callee_stack8([8 x i32] undef, i64 42)
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35 ret void
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37 ; CHECK: str {{x[0-9]+}}, [sp, #16]!
0
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38 ; CHECK-NEXT: b callee_stack8
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39 }
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41 define fastcc void @caller_to8_from8([8 x i32], i64 %a) {
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42 ; CHECK-LABEL: caller_to8_from8:
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43 ; CHECK: sub sp, sp, #16
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45 ; Key point is that the "%a" should go where at SP on entry.
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46 tail call fastcc void @callee_stack8([8 x i32] undef, i64 42)
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47 ret void
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49 ; CHECK: str {{x[0-9]+}}, [sp, #16]!
0
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50 ; CHECK-NEXT: b callee_stack8
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51 }
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53 define fastcc void @caller_to16_from8([8 x i32], i64 %a) {
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54 ; CHECK-LABEL: caller_to16_from8:
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55 ; CHECK: sub sp, sp, #16
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56
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57 ; Important point is that the call reuses the "dead" argument space
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58 ; above %a on the stack. If it tries to go below incoming-SP then the
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59 ; callee will not deallocate the space, even in fastcc.
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60 tail call fastcc void @callee_stack16([8 x i32] undef, i64 42, i64 2)
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62 ; CHECK: stp {{x[0-9]+}}, {{x[0-9]+}}, [sp, #16]
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63 ; CHECK-NEXT: add sp, sp, #16
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64 ; CHECK-NEXT: b callee_stack16
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65 ret void
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66 }
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69 define fastcc void @caller_to8_from24([8 x i32], i64 %a, i64 %b, i64 %c) {
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70 ; CHECK-LABEL: caller_to8_from24:
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71 ; CHECK: sub sp, sp, #16
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72
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73 ; Key point is that the "%a" should go where at #16 above SP on entry.
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74 tail call fastcc void @callee_stack8([8 x i32] undef, i64 42)
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75 ret void
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77 ; CHECK: str {{x[0-9]+}}, [sp, #32]!
0
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78 ; CHECK-NEXT: b callee_stack8
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79 }
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82 define fastcc void @caller_to16_from16([8 x i32], i64 %a, i64 %b) {
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83 ; CHECK-LABEL: caller_to16_from16:
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84 ; CHECK: sub sp, sp, #16
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85
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86 ; Here we want to make sure that both loads happen before the stores:
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87 ; otherwise either %a or %b will be wrongly clobbered.
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88 tail call fastcc void @callee_stack16([8 x i32] undef, i64 %b, i64 %a)
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89 ret void
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90
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91 ; CHECK: ldp {{x[0-9]+}}, {{x[0-9]+}}, [sp, #16]
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92 ; CHECK: stp {{x[0-9]+}}, {{x[0-9]+}}, [sp, #16]
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93 ; CHECK-NEXT: add sp, sp, #16
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94 ; CHECK-NEXT: b callee_stack16
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95 }
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0
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98 ; Weakly-referenced extern functions cannot be tail-called, as AAELF does
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99 ; not define the behaviour of branch instructions to undefined weak symbols.
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100 define fastcc void @caller_weak() {
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101 ; CHECK-LABEL: caller_weak:
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102 ; CHECK: bl callee_weak
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103 tail call void @callee_weak()
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104 ret void
0
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105 }