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annotate test/CodeGen/Hexagon/bit-has.ll @ 121:803732b1fca8

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LLVM 5.0
author kono
date Fri, 27 Oct 2017 17:07:41 +0900
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121
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1 ; RUN: llc -march=hexagon < %s | FileCheck %s
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2 ; REQUIRES: asserts
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3
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4 ; This used to crash. Check for some sane output.
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5 ; CHECK: sath
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6
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7 target triple = "hexagon"
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8
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9 define void @fred() local_unnamed_addr #0 {
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10 b0:
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11 %v1 = load i32, i32* undef, align 4
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12 %v2 = tail call i32 @llvm.hexagon.A2.sath(i32 undef)
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13 %v3 = and i32 %v1, 603979776
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14 %v4 = trunc i32 %v3 to i30
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15 switch i30 %v4, label %b22 [
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16 i30 -536870912, label %b5
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17 i30 -469762048, label %b6
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18 ]
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19
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20 b5: ; preds = %b0
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21 unreachable
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22
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23 b6: ; preds = %b0
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24 %v7 = load i32, i32* undef, align 4
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25 %v8 = sub nsw i32 65536, %v7
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26 %v9 = load i32, i32* undef, align 4
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27 %v10 = mul nsw i32 %v9, %v9
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28 %v11 = zext i32 %v10 to i64
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29 %v12 = mul nsw i32 %v2, %v8
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30 %v13 = sext i32 %v12 to i64
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31 %v14 = mul nsw i64 %v13, %v11
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32 %v15 = trunc i64 %v14 to i32
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33 %v16 = and i32 %v15, 2147483647
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34 store i32 %v16, i32* undef, align 4
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35 %v17 = lshr i64 %v14, 31
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36 %v18 = trunc i64 %v17 to i32
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37 store i32 %v18, i32* undef, align 4
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38 br label %b19
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39
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40 b19: ; preds = %b6
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41 br i1 undef, label %b20, label %b21
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42
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43 b20: ; preds = %b19
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44 unreachable
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45
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46 b21: ; preds = %b19
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47 br label %b23
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48
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49 b22: ; preds = %b0
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50 unreachable
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51
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52 b23: ; preds = %b21
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53 %v24 = load i32, i32* undef, align 4
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54 %v25 = shl i32 %v24, 1
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55 %v26 = and i32 %v25, 65534
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56 %v27 = or i32 %v26, 0
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57 store i32 %v27, i32* undef, align 4
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58 ret void
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59 }
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60
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61 declare i32 @llvm.hexagon.A2.sath(i32) #1
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62
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63 attributes #0 = { nounwind "target-cpu"="hexagonv5" "target-features"="-hvx,-long-calls" }
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64 attributes #1 = { nounwind readnone }