Mercurial > hg > Papers > 2015 > yuhi-master
annotate paper/master_paper.toc @ 11:265c2e89d54b
add table 5.2
author | Yuhi TOMARI <yuhi@cr.ie.u-ryukyu.ac.jp> |
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date | Sat, 31 Jan 2015 15:59:21 +0900 |
parents | 1519674c30ab |
children | 6277bb3a73e9 |
rev | line source |
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7 | 1 \contentsline {chapter}{\numberline {第1章}研究目的と背景}{1} |
2 \contentsline {section}{\numberline {1.1}本論文の構成}{2} | |
3 \contentsline {chapter}{\numberline {第2章}既存のマルチプラットフォームフレームワーク}{3} | |
4 \contentsline {section}{\numberline {2.1}OpenCL}{3} | |
5 \contentsline {subsection}{\numberline {2.1.1}Command Queue}{3} | |
6 \contentsline {subsection}{\numberline {2.1.2}メモリアクセス}{3} | |
7 \contentsline {subsection}{\numberline {2.1.3}データ並列}{5} | |
8 \contentsline {subsection}{\numberline {2.1.4}ワークグループ}{5} | |
9 \contentsline {section}{\numberline {2.2}CUDA}{6} | |
10 \contentsline {subsection}{\numberline {2.2.1}Stream}{7} | |
11 \contentsline {subsection}{\numberline {2.2.2}データ並列}{7} | |
12 \contentsline {section}{\numberline {2.3}StarPU}{8} | |
13 \contentsline {subsection}{\numberline {2.3.1}codelet}{8} | |
14 \contentsline {subsection}{\numberline {2.3.2}データ並列}{8} | |
15 \contentsline {chapter}{\numberline {第3章}Cerium}{11} | |
16 \contentsline {section}{\numberline {3.1}Cerium の概要}{11} | |
17 \contentsline {section}{\numberline {3.2}Cerium TaskManager}{11} | |
18 \contentsline {section}{\numberline {3.3}Cerium における Task}{12} | |
19 \contentsline {section}{\numberline {3.4}Task の Scheduling}{12} | |
20 \contentsline {section}{\numberline {3.5}Task 生成の例}{13} | |
21 \contentsline {chapter}{\numberline {第4章}Ceriumを用いた例題}{15} | |
22 \contentsline {section}{\numberline {4.1}Bitonic Sort}{15} | |
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23 \contentsline {section}{\numberline {4.2}Word Count}{17} |
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24 \contentsline {section}{\numberline {4.3}FFT}{19} |
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25 \contentsline {chapter}{\numberline {第5章}マルチコアへの対応}{20} |
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26 \contentsline {section}{\numberline {5.1}マルチコア上での実行の機構}{20} |
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27 \contentsline {section}{\numberline {5.2}ベンチマーク}{20} |
11 | 28 \contentsline {chapter}{\numberline {第6章}GPGPUへの対応}{22} |
29 \contentsline {section}{\numberline {6.1}OpenCL}{22} | |
30 \contentsline {subsection}{\numberline {6.1.1}OpenCL による実装の機構}{23} | |
31 \contentsline {subsection}{\numberline {6.1.2}ベンチマーク}{23} | |
32 \contentsline {section}{\numberline {6.2}CUDA}{23} | |
33 \contentsline {subsection}{\numberline {6.2.1}CUDA による実装の機構}{23} | |
34 \contentsline {subsection}{\numberline {6.2.2}ベンチマーク}{23} | |
35 \contentsline {section}{\numberline {6.3}データ並列}{23} | |
36 \contentsline {subsection}{\numberline {6.3.1}データ並列実行の機構}{23} | |
37 \contentsline {subsection}{\numberline {6.3.2}iterate API}{23} | |
38 \contentsline {subsection}{\numberline {6.3.3}ベンチマーク}{23} | |
39 \contentsline {chapter}{\numberline {第7章}並列処理向けI/O}{24} | |
40 \contentsline {section}{\numberline {7.1}新たに実装したI/Oの機構}{24} | |
41 \contentsline {section}{\numberline {7.2}ベンチマーク}{24} | |
42 \contentsline {chapter}{\numberline {第8章}Memory Allocator}{25} | |
43 \contentsline {section}{\numberline {8.1}現状のMemory Allocator}{25} | |
44 \contentsline {section}{\numberline {8.2}新しいMemory Allocator}{25} | |
45 \contentsline {section}{\numberline {8.3}ベンチマーク}{25} | |
46 \contentsline {chapter}{\numberline {第9章}結論}{26} | |
47 \contentsline {section}{\numberline {9.1}まとめ}{26} | |
48 \contentsline {section}{\numberline {9.2}今後の課題}{26} | |
49 \contentsline {chapter}{謝辞}{27} | |
50 \contentsline {chapter}{参考文献}{28} | |
51 \contentsline {chapter}{発表文献}{29} |