comparison llvm/test/TableGen/dag-isel-subregs.td @ 207:2e18cbf3894f

LLVM12
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Tue, 08 Jun 2021 06:07:14 +0900
parents 1d019706d866
children
comparison
equal deleted inserted replaced
173:0572611fdcc8 207:2e18cbf3894f
2 2
3 include "reg-with-subregs-common.td" 3 include "reg-with-subregs-common.td"
4 4
5 // CHECK-LABEL: OPC_CheckOpcode, TARGET_VAL(ISD::EXTRACT_SUBVECTOR), 5 // CHECK-LABEL: OPC_CheckOpcode, TARGET_VAL(ISD::EXTRACT_SUBVECTOR),
6 // CHECK: OPC_CheckChild1Integer, 0, 6 // CHECK: OPC_CheckChild1Integer, 0,
7 // CHECK: OPC_EmitInteger, MVT::i32, sub0_sub1, 7 // CHECK: OPC_EmitStringInteger, MVT::i32, sub0_sub1,
8 def : Pat<(v2i32 (extract_subvector v32i32:$src, (i32 0))), 8 def : Pat<(v2i32 (extract_subvector v32i32:$src, (i32 0))),
9 (EXTRACT_SUBREG GPR_1024:$src, sub0_sub1)>; 9 (EXTRACT_SUBREG GPR_1024:$src, sub0_sub1)>;
10 10
11 // CHECK: OPC_CheckChild1Integer, 15, 11 // CHECK: OPC_CheckChild1Integer, 30,
12 // CHECK: OPC_EmitInteger, MVT::i32, 5|128,1/*133*/, 12 // CHECK: OPC_EmitInteger, MVT::i32, 10|128,2/*266*/,
13 def : Pat<(v2i32 (extract_subvector v32i32:$src, (i32 15))), 13 def : Pat<(v2i32 (extract_subvector v32i32:$src, (i32 15))),
14 (EXTRACT_SUBREG GPR_1024:$src, sub30_sub31)>; 14 (EXTRACT_SUBREG GPR_1024:$src, sub30_sub31)>;