diff llvm/test/TableGen/dag-isel-subregs.td @ 207:2e18cbf3894f

LLVM12
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Tue, 08 Jun 2021 06:07:14 +0900
parents 1d019706d866
children
line wrap: on
line diff
--- a/llvm/test/TableGen/dag-isel-subregs.td	Mon May 25 11:55:54 2020 +0900
+++ b/llvm/test/TableGen/dag-isel-subregs.td	Tue Jun 08 06:07:14 2021 +0900
@@ -4,11 +4,11 @@
 
 // CHECK-LABEL: OPC_CheckOpcode, TARGET_VAL(ISD::EXTRACT_SUBVECTOR),
 // CHECK: OPC_CheckChild1Integer, 0,
-// CHECK: OPC_EmitInteger, MVT::i32, sub0_sub1,
+// CHECK: OPC_EmitStringInteger, MVT::i32, sub0_sub1,
 def : Pat<(v2i32 (extract_subvector v32i32:$src, (i32 0))),
           (EXTRACT_SUBREG GPR_1024:$src, sub0_sub1)>;
 
-// CHECK: OPC_CheckChild1Integer, 15,
-// CHECK: OPC_EmitInteger, MVT::i32, 5|128,1/*133*/,
+// CHECK: OPC_CheckChild1Integer, 30,
+// CHECK: OPC_EmitInteger, MVT::i32, 10|128,2/*266*/,
 def : Pat<(v2i32 (extract_subvector v32i32:$src, (i32 15))),
           (EXTRACT_SUBREG GPR_1024:$src, sub30_sub31)>;